category: Top Stories

category: Auto, Security & Edge AI

Reverse Engineering
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Ed Sperling Fabs and foundries frequently have been the savior of flawed designs, fixing problems such as power and performance, identifying design issues and often developing solutions to those problems. Over the next couple of process nodes, and in stacked die that will span multiple processes, there will be far fewer saves coming from the back end. Double and triple patterning, stress... » read more

Model Report Card
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Ann Steffora Mutschler From its perspective as a leader implementing system level design methodology, STMicroelectronics is uniquely positioned to discuss issues and challenges related to the use of models in a variety of use cases. System-Level Design had the opportunity recently to discuss challenges in the modeling space with Jean-Marc Chateau, director of ST’s SPT (System Platforms a... » read more

The Wi Of CES
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Pallab Chatterjee There has already been quite a bit written about the tablets, TVs and ultrabooks that consumed most of the floor space at this year’s CES show in Las Vegas. There was an underlying technology that was brought out at the show to bind these together—wireless. As the proliferation of content consumption device continues, creating a connected network to get this media a... » read more

Ambient Computing: Interdependencies Rule
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Ann Steffora Mutschler Ambient computing: Just the concept conjures up images of a Star Trek-like ‘Computer’ that is ever at the ready, awaiting a query at any moment, and which can discern as well as perform significant tasks. While Apple’s Siri gets there partway, it is significant because the concepts that make the technology possible behind the scenes draw upon a multidisciplinary... » read more

Will It Work?
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Ed Sperling Estimates of how much time it takes to verify a complex SoC are still hovering around 70% of the total non-recurring engineering costs, but with more unknowns and more things to verify it’s becoming harder to keep that number from growing. Verification has always been described as an unbounded problem. You can always verify more, and just knowing when to call it quits is so... » read more

Will It Really Work?
By Ed Sperling - 26 Jan, 2012 - Comments: 0

By Ed Sperling Estimates of how much time it takes to verify a complex SoC are still hovering around 70% of the total non-recurring engineering costs, but with more unknowns and more things to verify it’s becoming harder to keep that number from growing. Verification has always been described as an unbounded problem. You can always verify more, and just knowing when to call it quits is so... » read more

Rebalancing Power, Performance And Area
By Ed Sperling - 15 Dec, 2011 - Comments: 0

By Ed Sperling The tradeoffs between performance, power and area are being fine-tuned to a degree never seen before in the IC business, driven partly by complexity, partly by better tools, and partly by the need to gain a competitive edge in specific applications. Just being able to make these kinds of tradeoffs is a technological feat that marries everything from high-level modeling and sy... » read more

Too Many Standards, But Still Not Enough
By Ed Sperling - 15 Dec, 2011 - Comments: 0

By Ed Sperling The semiconductor industry has been one of the most prolific sectors in history when it comes to generating standards. Talk to any design engineer facing time-to-market pressures, new packaging approaches, and a mindboggling number of merchant IP, subsystems and interface requirements, and you’ll hear a compelling pitch for new standards. Talk to his or her boss and you’ll p... » read more

Off The Planar
By Ed Sperling - 15 Dec, 2011 - Comments: 0

By Pallab Chatterjee 3D devices, FinFETs and new memory technologies are not just a future direction anymore. They’re real. That became evident at this year’s IEDM conference, where the focus of a number of sessions was on modeling, failure and reliability models, as well as lower power supply operations for these devices. Because FinFETs are not standard 2D MOS devices, their use i... » read more

Model-Driven Design: Making Progress
By Ed Sperling - 15 Dec, 2011 - Comments: 0

By Ann Steffora Mutschler Model-driven design is coming into its own, in part because the old way of using models at advanced nodes doesn’t always produce usable chips and in part because of the need for making tradeoffs at the earliest stages of the design process. The concept of developing models for IC design is hardly a new one, and it is being done today on a number of levels rangin... » read more

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