category: Top Stories

category: Auto, Security & Edge AI

Getting Formal About Debug
By Brian Bailey - 25 Feb, 2016 - Comments: 0

While much of the design and verification flows have been automated, debug remains the problem child. It has defied automation and presents a management nightmare due to the variability of the process. In recent articles about debug, we examined how much time development teams spend in the debug process and some of the reasons why it is becoming a bigger problem. This includes issues such as ex... » read more

What’s Next For DRAM?
By Mark LaPedus - 24 Feb, 2016 - Comments: 2

The DRAM business has always been challenging. Over the years, DRAM suppliers have experienced a number of boom and bust cycles in a competitive landscape. But now, the industry faces a cloudy, if not an uncertain, future. On one front, for example, [getkc id="93" kc_name="DRAM"] vendors face a downturn amid a capacity glut and falling product prices in 2016. But despite the business chal... » read more

How Healthy Is The Chip Market?
By Ed Sperling - 22 Feb, 2016 - Comments: 1

By Ed Sperling & Ann Steffora Mutschler The inclusion of semiconductors in more products across more market segments—many of which historically have not been large consumers of chips—is having a big impact on how they are designed and manufactured, as well as how they are tracked and quantified. In the past, semiconductor sales were so closely tied to the success of personal computers... » read more

1xnm DRAM Challenges
By Mark LaPedus - 18 Feb, 2016 - Comments: 3

At a recent event, Samsung presented a paper that described how the company plans to extend today’s planar DRAMs down to 20nm and beyond. This is an amazing feat. Until very recently, most engineers believed DRAMs would stop scaling at 20nm or so. Instead, Samsung is ramping up the world’s most advanced DRAMs—a line of 20nm parts—with plans to go even further. Micron and SK Hynix soo... » read more

Consolidation Hits OSAT Biz
By Mark LaPedus - 18 Feb, 2016 - Comments: 0

The outsourced semiconductor assembly and test (OSAT) industry is undergoing a new wave of acquisition activity that will dramatically reshape the packaging and test services markets. [getkc id="83" kc_name="OSATs"] have seen a considerable amount of consolidation over the years, but the industry needs a scorecard to keep track of the recent deals and the resulting fallout. One OSAT deal inv... » read more

Internet of FD-SOI Things?
By Katherine Derbyshire - 18 Feb, 2016 - Comments: 0

Are fully-depleted silicon-on-insulator (FD-SOI) wafers having a moment? Certainly SOI wafers are not new. Soitec’s SmartCut layer transfer technology was patented in 1994, and wafers with implanted oxide layers were available before that. Still, adoption of SOI wafers has been limited. Though they offer improved device isolation and reduced parasitics, the increased wafer cost has been an ob... » read more

Inside Advanced Packaging
By Mark LaPedus - 18 Feb, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss advanced IC-packaging, the OSAT industry, China and other topics with Ron Huemoeller, vice president of worldwide R&D at Amkor. What follows are excerpts of that conversation. SE: Where are we in advanced IC-packaging today? Huemoeller: We’ve hit the inflection point. Now we are coming to the other side of it. Regarding this need to int... » read more

Reaching For ROI
By Ann Mutschler - 17 Feb, 2016 - Comments: 0

The simplest way to assess power and performance ROI of a chip design is to ask if the chip works and whether it meets the design specifications. But chips can be used in very different ways, and a single chip may have a number of operational modes, so that formula isn't so clear anymore. "Preventing failures is the No. 1 priority when it comes to ROI," said Aveek Sarkar, vice president of p... » read more

Why Power Modeling Is So Difficult
By Ed Sperling - 15 Feb, 2016 - Comments: 2

Power modeling has been talked about for years and promoted by EDA vendors and chipmakers as an increasingly important tool for advanced designs. But unlike hardware and software modeling, which have been proven to speed time to market for multiple generations of silicon, power modeling has some unique problems that are more difficult to solve. Despite continued development in this field, po... » read more

Debug Becomes A Bigger Problem
By Brian Bailey - 11 Feb, 2016 - Comments: 3

The EDA industry has invested enormous amounts of time and energy on the verification process, including new languages, new tools, new class libraries, new methodologies. But the one part of the cycle that defines that type of automation is debug. Development teams are spending half of their time in the debug process and the problem is growing. Part of the reason is that design and debug are... » read more

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