Executive Briefing: Naveed Sherwani


Open-Silicon's CEO talks with System-Level Design about getting the business priorities of designing a complex SoC in line with the technology; why getting chips out the door on time is critical and why it's not happening. [youtube vid=OAQ9JxJKYHU] » read more

Tech Talk: Atrenta CTO


Bernard Murphy talks with System-Level Design about what's changing in the semiconductor design area, how 3D stacking will affect design and what's needed in EDA tools. [youtube vid=kT3vs4sldSk] » read more

Executive Briefing: Jack Harding


eSilicon's CEO talks with System-Level Design about changes in design at advanced nodes, the power of 2.5D and 3D stacking, and how the semiconductor supply chain is changing.   [youtube vid=HlipMzgdksc]   » read more

One-On-One: Aart de Geus


Synopsys' CEO talks with Low-Power Engineering about the future of EDA, the changes in IP, stacked die and 20nm designs. [youtube vid=x9TKRC48OG0] » read more

IC Yield Issues


What makes one semiconductor design yield better than another. And what issues are we likely to face going forward. Semiconductor Manufacturing & Design questions Amiad Conley from Applied Materials; Cyrus Tabery from GlobalFoundries; Brady Benware from Mentor Graphics, and Ankush Oberai from Magma. [youtube vid=1YjY436YmNQ] » read more

Executive Briefing: Wally Rhines


Mentor's Chairman and CEO sounds off about where the IC design challenges are, what needs to be done to fix them, and what new opportunities will unfold.   [youtube vid=UGkpCtRdZJ0]   » read more

What’s Missing In Verification


System-Level Design talks with Mentor Graphics, Cadence, and an Accellera member about what's changing in verification--and where the missing pieces are.   [youtube vid=alb3dncca4o] » read more

Verification At 28nm And Beyond


Low-Power Engineering looks at the challenges ahead in IC verification with Frank Schirrmeister of Synopsys, Ran Avinun of Cadence, Prakash Narain from Real Intent and Lauro Rizzatti from EVE. [youtube vid=bc5IhGrlJo4] » read more

The Future Of EDA…And DAC


System-Level Design digs into the future of the design automation tools industry and the Design Automation Conference with Cadence's Neil Hand, Atrenta's Mike Gianfagna and Springsoft's Johnson Teng.   [youtube vid=IYA2o0tzOZs] » read more

Billion-Gate Chips


Low-Power Engineering examines hurdles ranging from power to cost in billion-gate IC designs with Arteris; Jack Browne, senior vice president of sales and marketing at Sonics; Kalar Rajendiran, senior director of marketing at eSilicon; Mark Throndson, director of product marketing at MIPS; and Mark Baker, senior director of business development at Magma. [youtube vid=0jum2ThIVzg] » read more

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