Chip Industry Technical Paper Roundup: July 1

Integrated phononic waveguide on thin-film lithium niobate on diamond; aZnMIm resist for EUV lithography; TMDC multi-channel GAA-FET architectures at sub-1nm; HW trojans detection using GNNs; agentic approach for SoC security verification; SiCN wafer bonding for 3D integration; PFAS in semiconductor manufacturing; patterned MW-NSFET with GAA and wrap-around contact.

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New technical papers recently added to Semiconductor Engineering’s library:

Name of Paper Research Organizations
Integrated phononic waveguide on thin-film lithium niobate on diamond Stanford University and UC Santa Barbara
Patterned Multi-Wall Nanosheet FETs for Sustainable Scaling: Zero Gate Extension With Minimal Gate Cut Width POSTECH
Extreme Ultraviolet and Beyond Extreme Ultraviolet Lithography using Amorphous Zeolitic Imidazolate Resists Deposited by Atomic/Molecular Layer Deposition Johns Hopkins Univ., Northwestern Univ., Intel Corp, Bruker Nano, EUV Tech and Lawrence Berkeley National Lab
Exploring optimal TMDC multi-channel GAA-FET architectures at sub-1nm nodes Sungkyunkwan University and Alsemy Inc
TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs University of Connecticut and University of Minnesota
SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models University of Florida
Material-Mechanistic Interplay in SiCN Wafer Bonding for 3D Integration Yokohama National University, TEL, SK hynix, and University of Tsukuba
Practical Guidance on Selecting Analytical Methods for PFAS in PFAS in Semiconductor Manufacturing Wastewater Oregon State University

Find more semiconductor research papers here.



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