AI export rule to be scrapped; tariff disruption; SEMI, EU request; Cadence, Nvidia supercomputer; AI co-processor; Imagination’s new GPU; semi sales up; imec, TNO photonics lab; NSF key to national security; flexible packaging control system; SiConic test engineering; USB 4 support; SiC JFETS; magnetic behavior in hematite.
Check out the Inside Chips podcast for our behind-the-scenes analysis.
The U.S. government is rescinding a Biden-era AI export rule that would have imposed complex restrictions on how U.S. chip and AI technology is sold abroad, a move welcomed by companies like Nvidia, reports Bloomberg. While new, simpler guidelines are expected in the coming months, the decision introduces short-term uncertainty for firms currently navigating export deals.
SEMI-Europe is calling on the EU to allocate €20 billion in its next long-term budget to support semiconductor development, raising the total investment to €260 billion while reducing reliance on non-European suppliers.
Financial releases this week: AMD, Arm, Bruker, GlobalFoundries, Kulicke & Soffa, Onsemi, Onto Innovation.
At its CadenceLive event, the company announced:
Fig. 1: The Cadence Tensilica NeuroEdge 130 AI Co-Processor (AICP). Source: Cadence
Global semiconductor sales reached $167.7 billion in Q1 2025, marking an 18.8% increase over Q1 2024, driven significantly by a nearly 45% sales surge in the Americas, reports the Semiconductor Industry Association. The organization also endorsed the newly introduced BASIC Act, which would increase the Advanced Manufacturing Investment Credit from 25% to 35% and extend it for four years to further boost U.S. semiconductor manufacturing.
Special Report: Intel Foundry, TSMC, and Samsung Foundry are scrambling to deliver all the foundational components of full 3D-ICs, which collectively will deliver orders of magnitude improvements in performance with minimal power some sometime within the next few years.
Quick links to more news:
Global
In-Depth
Markets and Money
Security
Product News
Automotive
Research
Quantum
Events and Further Reading
Europe/UK/ME:
USA:
Semiconductor Engineering published its Test, Measurement and Analytics newsletter this week, featuring these top stories:
More reporting this week:
Photolithography materials revenue will grow 7% to $5.06 billion in 2025, driven by a strong increase in EUV photoresists, expected to surge 30% year-over-year, reports TECHCET. Supply chain localization, geopolitical tensions, and innovations such as dry resist deposition and non-PFAS materials will significantly shape future market growth, projected at a 6% CAGR through 2029.
Android premium smartphone SoC revenues rose 34% YoY in 2024 pushed by more powerful AI-capable platforms, per Counterpoint.
Eyeo, an offshoot of imec, raised €15 million in seed funding with plans to increase the light sensitivity of image sensors.
Todd Austion’s HW security keynote at NEHWS discusses trusted hardware architecture, including its challenges and opportunities in the field.
Recent security research:
L3Harris received a total of $214 million in orders to support the German armed forces, including interoperable communication systems.
Cybersecurity and Infrastructure Security Agency (CISA), Federal Bureau of Investigation (FBI), Environmental Protection Agency (EPA), and Department of Energy (DOE) provided mitigation strategies to reduce cyber threats to OT, or operational technology. CISA also issued a number of new alerts/advisories.
Imagination launched its E-Series GPU, featuring neural cores that scale up to 200 TOPS (INT8/FP8), delivering significant acceleration for AI and compute workloads, and burst processors that deliver a 35% improvement in average power efficiency for edge applications.
Nordson and Nordmeccanica introduced the CWM, an advanced closed-loop control system for flexible packaging manufacturing that monitors and manages coating weights during the converting process.
Advantest launched SiConic Test Engineering (TE), a new addition to its SiConic platform that enables early bring-up and validation of structural and functional tests over high-speed I/O interfaces directly on the bench.
Keysight introduced support for USB4 Gen 2, 3, and 4, improving design productivity with simulation-driven virtual compliance test solutions.
Kyocera licensed Quadric’s Chimera general-purpose neural processor IP core for use in next-gen office automation SoC designs.
Siemens integrated Cybord’s AI technology with its Opcenter software for manufacturing execution systems, enhancing quality control for manufacturers’ surface mount technology processes.
Infineon introduced SiC JFETs (junction field-effect transistors) to deliver minimized conduction losses, solid turn-off capability, and high robustness. The company also announced that its OptiMOS 6 80V power MOSFETs set a new benchmark in DC-DC power conversion efficiency when integrated into the IBC stage of a leading AI server platform.
Brewer Science released its 2025 Impact Report, highlighting major strides in sustainability and corporate responsibility, including a 5% reduction in Scope 3 emissions in 2024 and progress toward its 80% GHG reduction goal by 2030.
TSMC‘s 3nm leading-edge node has achieved full utilization, driven by strong demand from AI and high-performance computing applications, reports Counterpoint. The upcoming 2nm node is also projected to reach full utilization swiftly, supported by broad adoption across major tech companies.
SiTime announced Symphonic, a mobile clock generator with an integrated MEMS resonator, aimed at 5G, GNSS, mobile, and IoT devices.
Asahi Kasei Microdevices developed the AP4413 series of ultra-low current PMICs, ideal for battery charging systems used in energy harvesting applications.
NEO Semiconductor developed new 1T1C and 3T0C 3D X-DRAM cell architectures that combine DRAM-like speed with NAND-style manufacturability, achieving up to 512Gb density, 10ns access times, and extended data retention.
Semidynamics introduced Cervell, a highly scalable and fully programmable NPU architected on RISC-V.
SGS-TÜV certified Infineon’s SEMPER NOR Flash memory to ASIL-D, the highest certification level for functional safety.
The MIPI Alliance updated its high-performance, low-power, and low electromagnetic interference C-PHY interface specification for connecting cameras and displays with an 18-Wirestate mode encoding option, increasing the maximum performance of a C-PHY lane by approximately 30 to 35 percent, with applications for ADAS, phones, and machine vision.
Florida Gulf Coast University presented: Risk Assessment and Threat Modeling for safe autonomous driving technology.
ETH Zurich researchers explored adoption challenges in enabling memory-centric computing.
NVIDIA researchers reported on differentiable congestion optimization in 3D-ICs.
EPFL researchers and partners reported magnetic behavior in hematite, which is much more environmentally friendly than materials currently used in spintronics.
Texas A&M University-Kingsville researchers and partners reported on the presence of negative differential resistance in a gate-all-around field effect transistor (GAAFET).
Solution-processed tin (Sn2+)-halide perovskites can be used to create p-channel thin-film transistors with performance levels comparable with commercial low-temperature polysilicon technology, according to research from POSTECH.
Carnegie Mellon University researchers developed compact rad-hard chips for space that achieve equivalent or better radiation tolerance than conventional designs.
Lawrence Berkeley National Laboratory and UC Berkeley scientists achieved record-high energy and power densities in microcapacitors made with engineered thin films of hafnium oxide and zirconium oxide.
A team at UC San Diego used NSF allocations on the Expanse supercomputer system at San Diego Supercomputer Center to better understand how to control magnetism at the atomic level using electric fields.
NTU Singapore and PureFize Technologies developed a small chip that harnesses the power of UV light for disinfection.
IonQ:
IBM, Tata, and the government of Andhra Pradesh will deploy India’s biggest quantum computer in the Quantum Valley Tech Park.
Brookhaven National Laboratory and Pacific Northwest National Laboratory scientists found a hidden interface in superconducting qubit material. The layer lies between a layer of tantalum metal and a sapphire substrate and hinders the qubit performance.
Lawrence Livermore National Laboratory researchers presented a new method to deposit quantum-dot films on corrugated surfaces.
Find upcoming chip industry events here, including:
Date | Location | |
---|---|---|
EVENTS | ||
VOICE Developer Conference | May 12 – 14 | Austin, Texas |
RISC-V Summit Europe | May 12 – 15 | Paris |
Siemens: User2User Europe | May 13 | Munich |
SEMICON Southeast Asia | May 20 – 22 | Singapore |
User2User North America: Siemens | May 20 | Santa Clara |
ITF World 2025 (imec) | May 20 – 21 | Antwerp, Belgium |
Embedded Vision Summit | May 20 -22 | Santa Clara, CA |
Ansys: Simulation World 2025 | May 21 – 22 | Virtual and some in-person events |
ESD Alliance Executive Outlook 2025 | May 22 | Santa Clara, CA |
ECTC 2025: Electronic Components and Technology Conference Conference | May 27 – 30 | Dallas, TX |
Hardwear.io Security Trainings and Conference USA 2025 | May 27 – 31 | Santa Clara, CA |
Find all events here. | ||
Upcoming webinars are here.
Semiconductor Engineering’s latest newsletters:
Automotive, Security and Pervasive Computing
Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials
Leave a Reply