Schottky barrier transistor; HW-accelerated RTL simulation; RISC-V microcontroller; GaN power devices; charging infrastructure and grid integration for electromobility; IFA for computing-in-memory; RISC-V vector HW for HPC; HW IP assurance against trojan attacks with ML.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| The Schottky barrier transistor in emerging electronic devices | THM University of Applied Sciences, Chalmers University of Technology, CNRS, University Grenoble Alpes and others. |
| Manticore: Hardware-Accelerated RTL Simulation with Static Bulk-Synchronous Parallelism | EPFL, University of Tokyo, Sharif University, and Indian Institute of Technology |
| X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller | Ecole Polytechnique Fédérale de Lausanne (EPFL) |
| Test-driving RISC-V Vector hardware for HPC | University of Edinburgh |
| Stability, Reliability, and Robustness of GaN Power Devices: A Review | Virginia Polytechnic Institute and State University, Johns Hopkins University Applied Physics Laboratory, and Kyushu University |
| Charging Infrastructure and Grid Integration for Electromobility | Universidad de los Andes, University of Cambridge, Duke University, Universidad Técnica Federico Santa Maria, University of Toronto, TU Delft, and University of Florence |
| Automated Information Flow Analysis for Integrated Computing-in-Memory Modules | RWTH Aachen University |
| Hardware IP Assurance against Trojan Attacks with Machine Learning and Post-processing | University of Florida and University of Kansas |
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