Chip Industry Technical Paper Roundup: Nov. 18


New technical papers recently added to Semiconductor Engineering’s library: [table id=492 /] Find more semiconductor research papers here. » read more

Comparative Analysis of CFET and NSFET Architectures (TU Munich, IIT)


A new technical paper titled "Impact of Aging, Self-Heating, and Parasitics Effects on NSFET and CFET" was published by researchers at TU Munich and Indian Institute of Technology. Abstract "This work presents a comparative analysis of complementary field-effect transistor (CFET) and nanosheet FET (NSFET) architectures, with a focus on self-heating effects (SHEs), negative bias temperature ... » read more

Free-Space Gated Transistor In Wide Bandgap And Ultra Wide Bandgap Semiconductors (KAUST Et Al.)


A new technical paper titled "Lateral Semiconductor–Free-Space Gate Transistors" was published by researchers at KAUST and the Indian Institute of Technology. Abstract "We introduce a novel lateral transistor architecture, the semiconductor−free-space gate transistor (SFGT), in which the conventional solid dielectric is replaced by a semiconductor−free-space gate configuration with su... » read more

Research Bits: Sept. 8


Gallium oxide pn diodes Researchers at Nagoya University fabricated functional gallium oxide pn diodes that can carry twice as much electrical current as previous gallium oxide diodes and waste less energy than silicon-based diodes. The key challenge in making the pn diode was creating a stable p-type gallium oxide layer. While gallium oxide's crystal structure easily accepts the atoms need... » read more

Research Bits: July 1


Copper-to-copper bonding for GaN integration Researchers from MIT, Georgia Tech, and Air Force Research Laboratory propose a bonding process to integrate gallium nitride (GaN) transistors onto standard silicon CMOS chips. They used the process to create a power amplifier. “We wanted to combine the functionality of GaN with the power of digital chips made of silicon, but without having to ... » read more

Chip Industry Technical Paper Roundup: May 6


New technical papers recently added to Semiconductor Engineering’s library: [table id=427 /] Find more semiconductor research papers here.   » read more

Investigation Of Self-Heating Effects on Fe-FinFETs On IMC Applications (TU Munich, IIT, U. Stuttgart)


A new technical paper titled "Investigating Self-Heating Effects in Ferroelectric FinFETs for Reliable In-Memory Computing" was published by researchers at TU Munich, University of Stuttgart and Indian Institute of Technology, Kanpur. Abstract "Ferroelectric (Fe) FET has emerged as a promising candidate for efficient in-memory computing due to its properties, such as non-volatility and lo... » read more

Impact Of Cryogenic Temps On The Minimum-Operating Voltage Of 5nm FinFETs-Based SRAM (IIT, UC Berkeley et al)


A new technical paper titled "An Investigation of Minimum Supply Voltage of 5nm SRAM from 300K down to 10K" was published by researchers at Indian Institute of Technology, UC Berkeley and Munich Institute of Robotics and Machine Intelligence. Abstract "In this article, we present a comprehensive study of the impact of cryogenic temperatures on the minimum-operating voltage (Vmin) of 5 nm ... » read more

Chip Industry Week In Review


Arm joined forces with Korea's Samsung Foundry, ADTechnology, and Rebellions to create a CPU chiplet platform for AI training and inference. The new chiplet will be based on Samsung's 2nm gate-all-around technology. Intel and AMD, arch competitors for decades, formed an x86 ecosystem advisory group to collaborate on architectural interoperability and simplify software development. Samsung... » read more

Research Bits: Jan. 8


High mobility graphene Researchers at the Georgia Institute of Technology and Tianjin University created a functional semiconductor made from graphene that is compatible with conventional microelectronics processing methods. "We now have an extremely robust graphene semiconductor with 10 times the mobility of silicon, and which also has unique properties not available in silicon," said Walt... » read more

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