Shrinking interconnects beyond copper; CFET, NSFET architecture comparative analysis; defractive processors; monolithic 3D stackable 1T1C DRAM; imaging buried interfaces in twisted oxide moirés; 3D-stacked chiplets LLM inference accelerator; lateral semiconductor–free-space gate transistors.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| Shrinking interconnects beyond copper | Florida State Univ., Cornell |
| Impact of Aging, Self-Heating, and Parasitics Effects on NSFET and CFET | TU Munich, IIT Kanpur |
| Massively parallel and universal approximation of nonlinear functions using diffractive processors | UCLA |
| Row Hammer Effect and Floating Body Effect of Monolithic 3D Stackable 1T1C DRAM | Georgia Tech |
| Mind the Gap — Imaging Buried Interfaces in Twisted Oxide Moirés | Cornell, SLAC, Stanford, USC, NC State Univ., Univ. of Chicago, USC, Institute for Basic Science, POSTECH |
| PICNIC: Silicon Photonic Interconnected Chiplets with Computational Network and In-memory Computing for LLM Inference Acceleration | National University of Singapore |
| Lateral Semiconductor–Free-Space Gate Transistors | KAUST, Indian Institute of Technology |
Find more semiconductor research papers here.
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