Follow The Moving Money

How economic considerations are affecting designs at advanced nodes and across geographies.

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Semiconductor economics are changing by market, by region, and by product node and packaging type, adding new complexity into decisions about which technology to use for which products and why.

Money is the common denominator in all of these decisions, whether it’s measured by return on invested capital, quarterly profits, or long-term investments that can include acquisitions, organic growth into new markets, or a mix of many things. The problem is that it’s becoming more difficult to make informed choices in the chip industry about how to grow profits because there are so many factors in flux.

Until just a few years ago, end markets for chips were well-defined and directions for development were largely confined to how quickly to migrate to the next process node. Fast forward to 2018 and there are multiple process choices, more new end markets, more packaging options, and new competition from a variety of sources. And there are unanswered questions in each of those areas, which can affect profitability and total cost of development.

For example, it’s not certain at this point how much 7nm chips will cost because so far there is no data on how fast chips will move through the fab. Much of that depends on the maturity of the process and the complexity of the chip, but part of it also depends on the number of wafers per hour EUV lithography will be able to process.


Fig. 1: Cost comparison at 7nm based upon EUV power supply. Source: Gartner/SEMI Industry Strategy Symposium

“With 7nm, you have a high design cost, so a new chip requires more than a $200 million investment,” said Samuel Wang, an analyst at Gartner, speaking at SEMI’s Industry Strategy Symposium this week. “But there also may be overcapacity by 2019. We’re expecting to see capacity for more than 400,000 wafers per month by then. At $10,000 per wafer, 7nm may not support those numbers.”

He said the demand for 7nm will be limited to a few end markets, such as smartphones, AI and bitcoin, which uses the same parallel processing approach as AI but different algorithms. And this is where things get really confusing. Bitcoin doesn’t show up on anyone’s radar right now, but it’s expected to contribute $0.4 billion to TSMC every quarter in 2022, Wang said. It’s the same for IoT endpoint chips, which are expected to be a $24 billion market by then, and ADAS semiconductors, which are expected to be a $10 billion market. AI deep neural network chips are expected to add another $16 billion to the total pie.

All of this drives equipment sales and design starts, but it’s hard to plan for markets that are just now beginning to take shape.


Fig. 2: Breakdown of wafer fab equipment revenue. Source: Gartner/ISS

Other technology shifts
Alongside these uncertain architectural developments, a number of tools, materials and structures are running out of steam. EUV is only now being deployed to replace 193nm immersion lithography. There is debate about whether finFETs will last another node, or whether gate-all-around FETs will be required to control leakage and improve manufacturability of increasingly taller fins. If GAA FETs replace finFETs, it may take longer to move to 7/5nm than anticipated, further derailing Moore’s Law.

Simultaneously, there is increased interest in advanced packaging, whether it’s 2.5D, 3D, fan-outs, or a number of other variations, and there is data to back up this shift.

Dan Tracy, senior director of SEMI Industry Research and Statistics, said gold wire has increased 7% due to memory packaging, while leadframe grew 8% in 2017. Gold wire is used for packaging in high-reliability markets such as automotive and medical, while leadframe is being used for connectors in automotive and mobile.

“We’re also seeing a tight supply for copper alloys,” Tracy said. “Over the last six to seven years, copper alloys have seen a decline. The trend for smaller, thinner packages has meant less demand for copper alloys.”

Meanwhile, wire bond has seen a resurgence, and there is much more interest in packaging at the wafer level. “As the industry moves to the next silicon nodes, new packaging solutions are needed to achieve the economic advantages that were previously met with scaling,” he said.

Design imperatives
What happens on the manufacturing side is only part of the picture, though. Unlike in years past, where changes typically were concentrated in one part of the supply chain, the move to 10/7nm has created issues everywhere. The best way to deal with those issues, and to reduce risk, is to limit flexibility through restrictive design rules and to carefully manage migration to new manufacturing technologies.

That works to a point, but it can’t fix everything. Complexity in design requires much more simulation, verification, and debug time, particularly as chips are used in markets such as automotive, industrial and medical, where chips are used for safety-critical functions. One solution is to ramp up the processing power through increasing parallelization.

“There are quite a few semiconductor companies already using the cloud quite effectively for regression testing or verification,” said David Pellerin, head of worldwide business development for Infotech/Semiconductor at Amazon Web Services. “They do a fair amount of regression testing on AWS. That’s sort of EDA-like work because they’re testing their own FPGA-designed software. This allows them to dramatically reduce the time to get regressions done and get results back to their teams. Cadence has been very aggressive about their use of the cloud, too.”

The key here is being able to parallelize various parts of the design flow, particularly on the verification side, which consumes the bulk of the design time for chips. It’s also where errors can creep in because there simply isn’t enough time to test everything. But by leveraging thousands of computers across AWS, this whole process can be speeded up. That either allows for faster time to market for consumer markets, or it allows more time to analyze data and figure out where the possible problems are, or where they will show up in the future.

“They can do 20 times faster regression by using the cloud because of the scale,” Pellerin said. “We are seeing adoption in EDA, we are seeing faster innovation in workloads such as timing analysis and DRC, software regression, hardware regression, and we anticipate more in coming months. Cloud is driving innovation in design engineering, and that includes semiconductor design.”


Fig. 3: Cloud improvements on the design side. Source: Amazon/Cadence/ISS

That’s at least one piece of the puzzle. The other piece is getting designs right the first time.

“The design cost has increased because of complexity in design,” said Gartner’s Wang. “First-time success is very important for 7nm.”

Crossing traditional market lines
Which devices will take advantage of the most advanced nodes is unclear, though. It’s also unclear how they will be used, and what technologies ultimately will be the big winners.

One indicator, which has worked well is a model developed by Benjamin Gompertz, a self-educated British mathematician, who first published his law of mortality in 1825. The model has been used, with a fair amount of accuracy, to map product lifecycles and predict how quickly demand will ramp and for how long.


Fig. 4: Gompertz’s formula and the resulting S curve. Source: Mentor/Siemens/ISS

The model can be used to show market opportunities for different technologies, which either tighten or stretch out the S curve.

“Growth in semiconductors comes in major waves, which cause another step up in semiconductor revenues,” said Wally Rhines, president and CEO of Mentor, a Siemens Business. “So if you look at IoT wearables, we are at the very beginning of that market. Through 2025 to 2030, that will be a reapidly growing market.”


Fig. 5: Wearables projection based on Gompertz curve. Source: Mentor/ISS

Compare that with the market for automotive night vision, which presumably will be supplanted by autonomous vehicles, and the shape of the curve looks very different.


Fig. 6: Automotive night vision systems. Source: Mentor/ISS

Geopolitical impact
These picture get cloudier when they is put in the context of a global geopolitical shifts, though. One process node ago, many of these issues were sequential or seemingly benign. They are now concurrent and accretive, and they are set within a complex geopolitical world order where some uncertainties are increasing while others are easing.

For the semiconductor industry, the big question mark is China. The nation has been investing heavily outside of its borders since the start of the millennium, and in its race to build its economy it has been consuming imports at an alarming rate internally. That has created a whopping trade deficit, which reached $260.1 billion in 2016. China is now starting to address that deficit by tightening capital and cutting imports.

“As U.S. debt decreases and China’s exports decrease, China is losing the ability to hash out a new agreement with the United States,” said Matt Gertken, associate vice president of geopolitical strategy at BCA Research. “China is weaning itself off exports for strategic reasons.”

That creates a double whammy, because growth is decelerating in China at a time when corporate debt is being scaled back. Corporate debt currently is close to 180% of China’s GDP. (See Fig. 7 below)


Fig. 7: Why China is heading toward reform. Source: BCA Research/ISS

“The market believes reform is coming,” said Gertken. “There has been a decrease in metal prices and import volumes. China will try to maintain stability. There is an increase in monetary tightening and regulatory tightening. There is an anticorruption campaign so regulators are not too close to banks. And there is more pressure on the property sector to reduce debt.”

In other regions, Europe seems to have survived Brexit intact. And in the United States, 2017 turned out to be a strong year for business. But Gertken noted that if Democrats gain control of the U.S. Congress, the result could be a return to protectionism as President Trump is forced to consolidate his base of support. And all of that has a ripple effect for semiconductor growth and demand.


Fig. 8: Seeds for protectionism? Source: BCA Research/ISS

Conclusion
There are lots of moving pieces in the global supply chain, but it is made worse by the fact that no one is quite sure how end markets will look, which technologies will best serve them, and how this will all shake out over the next couple years.

This is, to some extent, business as usual in a global climate. But underlying all of this there is a sense of more uncertainty on every level. There are reports of growing inventory at a number of system vendors, and questions about what will slow down when, where, and for how long. As Dan Niles, founder of AlphaOne NexGen Technology Fund noted at ISS, this is the second-longest-running bull market for the Standard & Poor’s index since World War II.


Fig. 9: Historical S&P bull markets. Source: AlphaOne/ISS.

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1 comments

memister says:

The EUV throughput (wafers per hour) depends on the dose, which in turn, depends on the feature size (need to keep same number of photons even for smaller size). Since the dose is increasing, the throughput is slowing down. So it’s not keeping up against multipatterning.

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