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Improving Test Coverage And Eliminating Test Escapes Using Analog Defect Analysis

A look at the methodology for performing analog fault simulation of test coverage based on defect-oriented testing.

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While the analog and mixed-signal components are the leading source of test escapes that result in field failures, the lack of tools to analyze the test coverage during design has made it difficult for designers to address the issue. In this white paper, we explore the methodology for performing analog fault simulation of test coverage based on defect-oriented testing. In addition, we look at how the Cadence Legato Reliability Solution can be used to calculate test coverage and demonstrate the feasibility of the solution on a practical design, enabled through an advanced fault simulation engine.

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