Benchmarking An NPU At Scale


With every Chimera SDK release, something quietly industrial happens: the entire 300+ model zoo gets automatically recompiled and re-profiled across a broad sweep of hardware configurations and the results land in DevStudio in the process. No one is hand-typing FPS numbers into a slide or running a single model on a single configuration to cherry-pick for a datasheet. The whole zoo moves forwar... » read more

An AI Model Fit For Purpose


Key takeaways A model can only be used for its intended purpose, in a defined context, without taking unknown risks.  Models must be created using a well-defined process and verified in a way that provides a level of independence.  Deployment requires trust and a way to track the properties of the model. A model captures some kind of behavior exhibited in the real world, b... » read more

From Reactive Replacement To Predictive Planning: Unlocking Probe Card Intelligence With Real-Time Data


Probe cards are among the most critical — and costly — assets in wafer test. Even if production line typically prepares on-demand spares, unexpected failure can cause significant downtime and production loss. One of the most persistent challenges is tip-burn degradation: gradual probe tips wear that ultimately leads to failure. A new technical initiative explores whether DC profiling dat... » read more

Data Center AI Growth Faces Challenging Bottlenecks


AI is rocketing ahead. It is the biggest industrial revolution of our age. AI adoption is growing, but still most are at early stages of learning. Anthropic, the leading frontier model provider with an annualized revenue run rate (ARR) of ~$47 billion with OpenAI close behind at ~$30 billion (Forbes). Google Gemini revenues aren’t broken out but Google Gemini processes over 3.2 quadrillion... » read more

Three Things DSP Adoption Can Teach Us About Edge AI


Edge AI is reaching a familiar inflection point, much like Digital Signal Processors (DSPs) did in the 1990s, with adoption challenges including the need for powerful specialized hardware, fragmented tooling, and significant complexity for developers. DSPs gained traction because they delivered substantially better power efficiency and performance for workloads that general-purpose processors h... » read more

Breaking LLMs With Fuzzing: Inside GPTFuzz’s Automated Jailbreak Machine


Software security has long relied on a technique called fuzzing, i.e. bombarding a program with malformed, unexpected, or mutated inputs until something breaks. Tools like AFL (American Fuzzy Lop) have uncovered thousands of real-world vulnerabilities this way. At Keysight, fuzzing has been a core part of security testing for years, with extensive expertise in protocol fuzzing, dedicated fu... » read more

Verification Methodologies Struggle To Keep Up With AI


Key Takeaways:  The rapid development of AI has resulted in new capabilities being provided to verification teams, beyond their ability to rationally insert them into accepted methodologies.  There is a lot of uncertainty about who will benefit the most from this technology. Is AI a junior engineer replacement or an enhancer?  The biggest benefits will come when AI helps engineers... » read more

More Massive Still: Why AI Infrastructure Demands A Unified Design Approach


At the recent Data Center World 2026 in Washington, D.C., one message came through louder than ever: AI infrastructure is scaling faster than any system we’ve built before—and the industry can no longer afford to design it in silos. The workshop: “More Massive Still! Delivering AI-Driven Scale in the Face of Historic Constraints” captured this perfectly: the industry is shifting fr... » read more

Introducing An Agentic LLM For Chip Design


By Tanay Biradar, Surya Gunukula, Tengxiao Liu, and Kexun Zhang ChipAgents has introduced Renoir, an agentic large language model (LLM) whose name means "renew." In early chip design benchmarks, Renoir outperforms the base model it was trained on and cuts costs by more than half. Furthermore, it can run entirely on-premises, allowing semiconductor companies to develop faster without compromi... » read more

Cloud HPC For AI: Addressing Latency, Cost, And Scale At The Architectural Level


Many organizations assume that moving HPC workloads to the cloud is simply a matter of lifting and shifting on-premises clusters. In practice, that approach often erodes performance, inflates costs, and undermines AI training efficiency. Getting the most out of HPC in the cloud requires a fundamentally different architectural approach — one that minimizes latency, maximizes utilization, an... » read more

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