Data Center Chokepoints Tied To AI, Political Pressure, Supply Chain


Key Takeaways: AI-driven compute demands have led to several distinct supply chain bottlenecks for data centers. Legacy power management solutions cannot meet the current demand, and interest in nuclear power for data centers is growing. State governments have a variety of new requirements on data center operators. Hyperscalers have leaned into specialized facility design to meet ... » read more

From Feature-Scale Simulation To Digital Twins: Helping Process Engineers Tackle Growing Complexity


For process engineers facing rising manufacturing complexity, physics-based simulation provides the foundation for understanding what is happening on the wafer. AI, automation, and digital twins become powerful only when they build on that foundation, enabling faster exploration without losing trust, calibration, or engineering judgment. The growing challenge of semiconductor manufacturing Se... » read more

AI In Chip Design: Lots Of Promise, Plenty Of Unanswered Questions


Key Takeaways: AI opens the door to exploring a much larger solution space, similar to what high-level synthesis did years ago, but questions persist about the impact of increasing reliance on what is essentially a black-box chip design. There is no consistent answer to how successful AI will be, where it will succeed or fail, or how it will apply to different markets and EDA customers.... » read more

Change Is Tough


When I was actively involved in the creation of standards for the EDA and semiconductor industry, it was often joked that the great thing about standards is that there are plenty to choose from. According to the Internet, this quote can either be attributed to Grace Murray Hopper (an incredible pioneer in the development of modern programming languages and a rear admiral in the Navy), or Andrew... » read more

Innovation First, AI Second: Lessons From SSN And The Future Of Test


By Marc Hutner and Ron Press Artificial Intelligence is rapidly becoming pervasive in society and across semiconductor development processes. We have to be careful not to apply AI to solve optimizations and challenges of existing methods but pair with engineering innovation for evolutionary results. One example is the application of scan test data in multi-core designs. AI can optimize the d... » read more

Rethinking Ethernet For The AI Scale-Up Era: Inside ESUN


Every generation of AI infrastructure has redefined what "the network" means. In today's training clusters — scaling from hundreds to hundreds of thousands of accelerators — the interconnect is no longer a supporting actor. It has become a first-order determinant of system throughput, utilization, and cost per token. Accelerators inside these systems don't just move data; they synchronize o... » read more

The Architecture Decisions Behind A Production-Ready EDA AI Agent


The conversation about agentic AI in semiconductor and PCB design tends to focus on capability: what the agent can do, how much time it saves, and which parts of the workflow it can automate. That is a reasonable place to start, but that is not where the hard engineering happens. Organizations are now asking whether AI agents can take on meaningful portions of the workflow, not as assistants th... » read more

The Expansion Of LPDDR Into Edge AI Platforms


As artificial intelligence continues its migration from centralized data centers to distributed systems, one reality is becoming unmistakable: the future of AI is increasingly defined at the edge. Whether embedded in smart cameras, industrial controllers, or next-generation vehicles, AI is no longer confined to racks of GPUs. It is operating in power-constrained, thermally limited, and space-re... » read more

AI Is Rewriting The IP Playbook


Key Takeaways:  AI is reshaping the entire IP lifecycle, from creation and verification to discovery, licensing, and support.  Fast-changing AI models are making flexible IP, robust toolchains, and faster deployment essential.  Human expertise remains critical for reviewing, validating, and governing AI-assisted IP development.  AI is becoming part of the everyday work o... » read more

From Host Node To Heterogeneous Rack: Rethinking The AI CPU


AI infrastructure is entering a crucial new phase. The first phase of generative AI infrastructure was defined by accelerator scale: how many GPUs, NPUs or custom AI accelerators could be deployed, powered, cooled and connected. That phase is not over, but it is no longer sufficient. The next phase is about rack-scale system composition: heterogeneous AI racks where different compute resourc... » read more

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