tag: ARM

Moore’s Law: A Status Report
By Ed Sperling - 20 Apr, 2017 - Comments: 3

Moore's Law has been synonymous with "smaller, faster, cheaper" for the past 52 years, but increasingly it is viewed as just one of a number of options—some competing, some complementary—as the chip industry begins zeroing in on specific market needs. This does not make [getkc id="74" comment="Moore's Law"] any less relevant. The number of companies racing from 16/14nm to 7nm is higher t... » read more

Cloud Computing Chips Changing
By Ann Mutschler - 19 Apr, 2017 - Comments: 1

An explosion in cloud services is making chip design for the server market more challenging, more diverse, and much more competitive. Unlike datacenter number crunching of the past, the cloud addresses a broad range of applications and data types. So while a server chip architecture may work well for one application, it may not be the optimal choice for another. And the more those tasks beco... » read more

Blog Review: April 19
By Jesse Allen - 19 Apr, 2017 - Comments: 0

Mentor's Tom Fitzpatrick explains what the Portable Stimulus standard will do, what it won't, and why the choice of input language defined by the standard matters. Cadence's Paul McLellan listens in as IRDS chairman Paolo Gargini explains how long it takes technology breakthroughs to make out of the lab and into high-volume manufacturing. Synopsys' Robert Vamosi points to the recent sound... » read more

The Hidden Costs Of Security
By Ed Sperling - 13 Apr, 2017 - Comments: 0

There is no argument these days among chipmakers that security needs to be implemented at every level. So why isn't it happening? The answer is more complex than companies pinching pennies, although that is certainly a factor for some chips. The reality, though, is security carries a price for every facet of semiconductor design—power, performance and area. And the impact reaches much furt... » read more

Managing Voltage Drop At 10/7nm
By Ann Mutschler - 13 Apr, 2017 - Comments: 0

Power integrity is becoming a bigger problem at 10/7nm because existing tools such as static analysis no longer are sufficient. Power integrity is a function of static and dynamic voltage drop in the power delivery network. And until recently, static analysis did an effective job in measuring the overall robustness of PDN connectivity. As such, it is a proxy for PDN strength. The problem is ... » read more

Rethinking Computing For The AI Age
By Govind Wathan - 13 Apr, 2017 - Comments: 0

Cisco estimates that global cloud IP traffic will nearly quadruple in the next five years. Information consumption is exploding with artificial intelligence (AI) embedded into all devices and experiences surrounding us. However, we do not want that to come at a cost of our security and privacy. Talk about pressure. On you. Today, much of computing is done in the cloud for things that you are... » read more

Electric Vehicles Set The Pace
By Gale Morrison - 13 Apr, 2017 - Comments: 0

Electric vehicles are leading the charge for innovation in automotive electronics. Companies that invested and embraced the challenge of EVs are besting their less-nimble, less-open-minded engineering cohorts. Semiconductors and embedded computers have been controlling the dashboard, mirrors, seats, heating and cooling for years. But with EVs, engineering teams are starting to tackle tas... » read more

Intelligent Power Allocation
By Arm - 12 Apr, 2017 - Comments: 0

The modern System-on-Chip (SoC) has higher thermal dissipation than its previous generations, because of the following factors: Increasing processor frequencies. Decreasing SoC package and device sizes. Higher levels of integration. Static power consumption trends with the most advanced SoC fabrication[1]. Faster frequencies mean faster switching, which means more power consumption... » read more

Blog Review: April 12
By Jesse Allen - 12 Apr, 2017 - Comments: 0

Cadence's Paul McLellan discusses the legal concerns around autonomous vehicles, emotion-based driver monitoring, and the role of LiDAR, from the CASPA Symposium on Autonomous Driving. The IEEE Design & Test's Magdy Abadir interviews Mentor's Wally Rhines in a discussion ranging from EDA growth and its economics to the increasing complexity of verification. Synopsys' Robert Vamosi exa... » read more

Supporting CPUs Plus FPGAs
By Brian Bailey - 11 Apr, 2017 - Comments: 5

While it has been possible to pair a CPU and FPGA for quite some time, two things have changed recently. First, the industry has reduced the latency of the connection between them and second, we now appear to have the killer app for this combination. Semiconductor Engineering sat down to discuss these changes and the state of the tool chain to support this combination, with Kent Orthner, system... » read more

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