Blog Review: May 3


Cadence's Paul McLellan shares highlights from a recent IRDS panel, including changing the assumptions about computing and looking for the next "killer app." Synopsys' Meenakshy Ramachandran introduces the array of improvements in HDMI 2.1, from higher bandwidth to Dynamic HDR. Mentor's Minghui Fan checks out advancements in optical proximity correction and resolution enhancement technolo... » read more

What’s Next In Neural Networking?


Faster chips, more affordable storage, and open libraries are giving neural network new momentum, and companies are now in the process of figuring out how to optimize it across a variety of markets. The roots of neural networking stretch back to the late 1940s with Claude Shannon’s Information Theory, but until several years ago this technology made relatively slow progress. The rush towar... » read more

Can Formal Replace Simulation?


A year ago, [getentity id="22147" comment="Oski Technology"] achieved something that had never happened before. It brought together 15 of the top minds in [getkc id="33" kc_name="formal verification"] deployment and sat them down in a room to discuss the problems and issues they face and the ways in which they are attempting to solve those problems. Semiconductor Engineering was there to record... » read more

The Week In Review: Design


IP ARM launched the Mali-C71 image signal processor (ISP), targeting ADAS SoCs. The ISP is capable of processing up to 4 real-time cameras and 16 camera streams with a single pipeline and provides advanced error detection with more than 300 dedicated fault detection circuits. Included is full reference software to control the ISP, sensor, auto white balance and auto exposure. Synopsys ext... » read more

Speeding Up Neural Networks


Neural networking is gaining traction as the best way of collecting and moving critical data from the physical world and processing it in the digital world. Now the question is how to speed up this whole process. But it isn't a straightforward engineering challenge. Neural networking itself is in a state of almost constant flux and development, which makes it something of a moving target. Th... » read more

Design Complexity Drives New Automation


As design complexity grows, so does the need for every piece in the design flow—hardware, software, IP, as well as the ecosystem — to be tied together more closely. At one level, design flow capacity is simply getting bigger to accommodate massive [getkc id="185" kc_name="finFET"]-class designs. But beyond sheer size, there are new interactions in the design flow that place much more emp... » read more

Software Driven Test Of FPGA Prototype


Most everyone would agree how important FPGA prototyping is to test and validate an IP, sub-system, or a complete SoC design. Before the design is taped-out it can be validated at speeds near real operating conditions with physical peripherals and devices connected to it instead of simulation models. At the same time, these designs are not purely hardware, but these days incorporate a significa... » read more

Blog Review: April 26


Cadence's Paul McLellan provides an introduction to single-event effects and the challenges created when high-energy neutrons bombard chips. Synopsys' Robert Vamosi looks at the strange turf war between two worms battling for control of IoT security cameras. Mentor's Ayan Pahwa contends that it's the duty of IoT device developers to take security as paramount factor and provide good secur... » read more

Prototyping ARM Cortex-A Processors Using FPGA Platforms


With the increasing cost and complexity involved in new SoC (System-on-Chip) designs, FPGA (Field Programmable Gate Array) prototyping is becoming an increasingly important, or even crucial, part of new SoC projects. By offering a way to get to hardware sooner, FPGA prototyping allows hardware verification and software work to begin earlier, before first silicon, effectively pipelining the desi... » read more

The Week In Review: Design


Tools Mentor unveiled new formal-based technologies in the Questa Verification Solution. It offers formal-based RTL-to-RTL equivalence checking flows optimized for verification of manual low-power clock gating, bug fix and ECO validation, and ISO 26262 safety mechanism verification, which the company says which can reduce verification turnaround time by 10X. The app also offers expanded cloc... » read more

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