A Broad, Effective Approach to Optimizing for Power


As an industry we talk a lot about the challenges of power-aware design and accompanying issues at leading-edge nodes. There’s no denying some tough challenges, but if we’re honest, there are plenty of opportunities we can exploit right now to improve power in our designs. You’ve heard the saying, “death by a thousand cuts?” Well, when it comes to grappling with power in today’s ... » read more

Power Breaks Everything


The emphasis on lowering power in everything from wearable electronics to data centers is turning into a perfect storm for the semiconductor ecosystem. Existing methodologies need to be fixed, techniques need to be improved, and expectations need to be adjusted. And even then the problems won't go away. In the past, most issues involving power—notably current leakage, physical effects such... » read more

The Week In Review: Design/IoT


The EDA Consortium announced EDA industry revenue increased 7.5% for Q1 2015 to $1877 million, compared to $1746.1 million in Q1 2014. The four-quarters moving average, which compares the most recent four quarters to the prior four quarters, increased by 8.0%. Employment also increased, and according to Wally Rhines, "all categories showed revenue increases except CAE. Geographically, the Ameri... » read more

Cloud 2.0


Corporate data centers are reluctant adopters of new technology. There is too much at stake to make quick changes, which accounts for a number of failed semiconductor startups over the past decade with better ideas for more efficient processors, not to mention rapid consolidation in other areas. But as the amount of data increases, and the cost of processing that data decreases at a slower rate... » read more

IP Integration Challenges Increase


Semiconductor Engineering sat down with Chris Rowen, CTO of [getentity id="22032" e_name="Cadence"]'s IP group; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; Patrick Soheili, vice president of product management and corporate development at [getentity id="22242" e_name="eSilicon"]; Navraj Nandra, senior director of marketing for DesignWare analog and mixed-signal IP at [getentity ... » read more

Blog Review: July 8


In this week's picks for his top five technology articles, Ansys' Justin Nescott rolls in with two ways for cyclists to improve safety, the development of the wheelchair and the advancement of fingerprint scanners for healthcare and security. With the launch of the BBC Micro:bit, one part of a program to inspire young people to get into coding and digital creation, ARM's Gary Atkinson shows ... » read more

Securing Modern-Day Devices With Embedded Virtualization And ARM TrustZone Technology


When securing today’s modern devices, it’s not enough to know the type of device you want to secure. Equally important is the process used to develop that device. In this paper, we’ll take a closer look at security as it relates to protecting data, building security into a device, and securing SoCs in multicore architectures. ARM TrustZone technology, which provides a solution for carving... » read more

Blog Review: July 1


On the eve of his retirement, Cadence's Richard Goering takes a look back at 30 years of covering EDA: the highlights, the lowlights, and the headlights shining into the future. Established nodes are experiencing a much higher demand than one might normally expect at this point in their lifecycle. Mentor's Michael White examines the dynamics and market forces behind the longevity, and the ch... » read more

The Future Of Moore’s Law


Semiconductor Engineering sat down to discuss the future of Moore's Law with Jan Rabaey, Donald O. Pederson distinguished professor at [getentity id="22165" comment="UC Berkeley"]; Lucio Lanza, managing director of Lanza techVentures; Subramani Kengeri, vice president of advanced technology architecture at [getentity id="22819" comment="GlobalFoundries"]; Charlie Cheng, CEO of [getentity id="2... » read more

The Week In Review: Design/IoT


IP Sonics released the latest version of the company's flagship NoC, which expands on their interleaved multi-channel technology and includes new layout optimization features for design flows based on modern physical synthesis and place & route tools. Synopsys extended its PCI Express 4.0 IP to support RAS features to help designers ensure data integrity and increase data protection i... » read more

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