Making Sense Out Of Convergence


By Ed Sperling Technology convergence and market consolidation have always gone hand in hand, although not necessarily in ways everyone expects. The confluence of video and audio was first exhibited by AT&T at the 1964 World’s Fair. The rather crude videophone demonstration promised a future where people could actually see the person they were talking with. Fast forward 45 years and... » read more

Less Room For Error


By Ed Sperling Say goodbye to fat design margins in advanced SoCs. The commonly used method of adding extra performance or area into semiconductors to overcome variability in manufacturing processes or timing closure issues has begun to create problems of its own. While there was plenty of slack available at 90nm, adding margins at 45nm and 32nm disrupts performance or eats into an increasing... » read more

How Many Power Islands Is Too Many?


By Ed Sperling Power domains, also known as power islands, have become to design engineers what multiple cores are to processor architects. They can serve a purpose, namely reducing static current leakage and saving battery life. But they also can add so much complexity that they can make it almost impossible to get a new chip out the door. Just as there has been talk of hundreds of cores, th... » read more

Writing Software For Low-Power Systems


By Ed Sperling Almost any discussion of software in low power systems these days involves some sort of multicore approach. That is particularly true at 90nm and below. At 65nm, unless there is a very distinct purpose for a low-power single-core device, it probably is utilizing at least two cores, and at 45nm the numbers can continue to rise, depending upon how many functions the chip is being... » read more

Taming The Multicore Beast


By Ed Sperling Multicore chips are here to stay. Now what? That question is echoing up and down the ranks of tools vendors, design engineers, software developers and even among people who measure the performance and efficiency of semiconductors. There is now a Multicore Expo and a Multicore Association that includes a who’s who of electronics. And there are lots of working groups developing... » read more

Exploring The Use Of Virtual Platforms At The Electronic System Level


By Cheryl Ajluni System design is hard. That should not come as a surprise to anyone these days. With design geometries shrinking and device complexity on the rise, this fact is not likely to change anytime soon. One concept for easing that burden for system-level designers is the virtual platform. Granted, the concept itself is nothing new, but today it is being employed in ever more creativ... » read more

Must-Have Tools For Engineers


It may be one of the best equipped system-development labs on Earth, but it's largely used to create designs that aren't used on this planet. [youtube vid=khCj-7ftAzw] » read more

NoC Your SoCs Off


By Ed Sperling The network on a chip (NoC) approach is gaining ground as an essential part of a system on a chip (SoC), providing the same kind of time-to-market advantage that well-tested intellectual property blocks provide. This follows almost eight years of hype about NoCs potential with little to show for it. Times have changed and there appear to be two main drivers, one technological a... » read more

Next Steps In Verification IP


By Ann Steffora Mutschler With the cost of failure at an astronomical high, the last thing chip designers want to worry about is the physical IP they will use to build their SoC. In addition to less willingness on the customer’s behalf to take risks, complexity and economics have driven the need for more off-the-shelf IP and a corresponding rise in interest in verification IP. Compoundi... » read more

The Trouble With Multicore Software


David Patterson, Professor of Computer Science at UC Berkeley, presented his views to the Naval Postgraduate School about the prospects for multicore programming success. This video was excerpted from his presentation. [youtube vid=EDHXIH8DlLY] » read more

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