tag: IP

Porting To ARM 64-Bit
By Various Writers - 09 Apr, 2014 - Comments: 0

Why 64-bit? It seems that is a question with many answers! For some, it will be the need to address more than 4GB of memory, for others the need for wider registers and greater accuracy of 64-bit data processing, for still others the attraction of a larger register set. Whatever your reason for looking to move to 64-bit, it is likely that you will have a body of legacy software which will ne... » read more

Tech Talk: Debugging IP
By Ed Sperling - 03 Apr, 2014 - Comments: 0

Just because IP is standard doesn't mean it will function as expected in a complex SoC. Ravindra Aneja, senior technical marketing manager at Atrenta, looks at what needs to be done to make sure everything works together. [youtube vid=wlDabbrF2zU] » read more

Changes At DAC
By DAC - 28 Mar, 2014 - Comments: 0

The 2014 DAC program is live, and for those who just can’t wait, here is a sneak peak of one of the new initiatives at the show. This year DAC introduces a brand new track focused 100% on IP. The IP Track will be on Monday, June 2, and includes six sessions running in two rooms adjoining the exhibit floor. This track provides creators and users of IP with an open forum to exchange information... » read more

EDA Shapes Its Future
By Brian Bailey - 27 Mar, 2014 - Comments: 2

In part one of this series, Semiconductor Engineering looked at growth within the EDA industry and the types of approaches being made to expand the scope of the markets that they serve. Scope expansion comes from the creation of new tools, the growth of companies in the IP space and the various ways in which opportunities can be found in new markets. Additional growth opportunities come from so... » read more

The Week In Review: Design
By Ed Sperling - 21 Mar, 2014 - Comments: 0

Tools Mentor Graphics unveiled a new version of its PCB design platform, even going so far as to rename it slightly (Expedition to Xpedition). Mentor claims it’s the most significant product in that space in years, bridging the environments between designers and engineers. Included are placement planning in densely packed boards, which simplifies re-use and improves time to market, and elect... » read more

Big Shift In SoC Verification
By Ed Sperling - 17 Mar, 2014 - Comments: 2

Semiconductor Engineering sat down to discuss software-driven verification with Ken Knowlson, principal engineer at Intel; Mark Olen, product manager for the Design Verification Technology Division of Mentor Graphics; Steve Chappell, senior manager for CAE technology and verification at Synopsys; Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadenc... » read more

More Pain In More Places
By Ed Sperling - 14 Mar, 2014 - Comments: 2

Pain is nothing new in to the semiconductor industry. In fact, the pain of getting complex designs completed on budget, and finding the bugs in those designs, has been responsible for decades of continuous growth in EDA, IP, test, packaging, and foundries. But going forward there is change afoot in every segment of the flow from architecture to design to layout to verification to manufacturi... » read more

The Week In Review: Design
By Ed Sperling - 14 Mar, 2014 - Comments: 0

Tools Synopsys uncorked the next version of its verification tool, which includes static and formal verification, new debug capabilities, and low-power and X-propagation simulation. The company says the new tool offers up to 5X performance improvement. Cadence rolled out a new version of its verification solution for designs using ARM’s interconnect IP, speeding up verification and analys... » read more

Do We Need A “Glue” Engineer?
By Brian Fuller - 13 Mar, 2014 - Comments: 0

Design and verification are so complex today and fraught with market risk that it keeps managers awake and sweating at night. So much of design is carved up in IP blocks and subsystems, each with their own verification issues and methodologies. To manage the complexity the design is partitioned, and so too are the teams. But as software verification becomes more crucial to system-design succ... » read more

Design Guidelines For Embedded Real Time Face Detection Application
By Various Writers - 12 Mar, 2014 - Comments: 0

This paper presents steps for real-time deployment of face detection application on a programmable vector processor. The steps taken are general purpose in the sense that they can be used to implement similar computer vision algorithms on any mobile device. To download this white paper, click here. » read more

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