tag: Synopsys

Trading Off Power And Performance Earlier In Designs
By Ann Mutschler - 12 Sep, 2019 - Comments: 0

Optimizing performance, power and reliability in consumer electronics is an engineering feat that involves a series of tradeoffs based on gathering as much data about the use cases in which a design will operate. Approaches vary widely by market, by domain expertise, and by the established methodologies and perspective of the design teams. As a result, one team may opt for a leading-edge des... » read more

Reducing Software Power
By Brian Bailey - 12 Sep, 2019 - Comments: 0

With the slowdown of Moore's Law, every decision made in the past must be re-examined to get more performance or lower power for a given function. So far, software has remained relatively unaffected, but it could be an untapped area for optimization and enable significant power reduction. The general consensus is that new applications such as artificial intelligence and machine learning, whe... » read more

Blog Review: Sept. 11
By Jesse Allen - 11 Sep, 2019 - Comments: 0

Cadence's Paul McLellan checks out the challenges of processing-in-memory and the steps involved in building a logic flow on a DRAM process. Synopsys' Taylor Armerding notes that with safety-critical software an ever-present factor in modern life, it's more necessary than ever to take the time to ensure quality and security when failures can be life-threatening. In a video, Mentor's Colin... » read more

Synopsys FPGA Platform: Enabling Faster Design, Verification and Debug of FPGAs
By Synopsys - 11 Sep, 2019 - Comments: 0

Field programmable gate arrays (FPGAs) are no longer the co-processor of full-custom chips and application-specific integrated circuits (ASICs). Today's FPGA offerings include devices as large and complex as any ASIC system-on-chip (SoC) on the market. The dramatic increase in size, complexity and functionality means that many FPGA development teams are adopting ASIC-style design, verification ... » read more

Test On New Technology’s Frontiers
By SE Staff - 10 Sep, 2019 - Comments: 2

Semiconductor testing is getting more complicated, more time-consuming, and increasingly it requires new approaches that have not been fully proven because the technologies they are addressing are so new. Several significant shifts are underway that make achieving full test coverage much more difficult and confidence in the outcome less certain. Among them: Devices are more connected an... » read more

Week in Review – IoT, Security, Autos
By Jeff Dorsch - 06 Sep, 2019 - Comments: 0

Products/Services Rambus entered an exclusive agreement to acquire the Silicon IP, Secure Protocols, and Provisioning business from Verimatrix, formerly known as Inside Secure. Financial terms were not revealed. The transaction is expected to close this year. Rambus will use the Verimatrix offerings in such demanding applications as artificial intelligence, automotive, the Internet of Things, ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 06 Sep, 2019 - Comments: 0

Rambus will acquire the Silicon IP, Secure Protocols and Provisioning business from Verimatrix, formerly Inside Secure. The secure silicon IP and provisioning solutions from both companies will be integrated into a single portfolio of products and the embedded security teams from Verimatrix will join Rambus. “Integrating the Verimatrix embedded security team into Rambus, a recognized leader i... » read more

Advantages Of LPDDR5: A New Clocking Scheme
By Brett Murdock - 05 Sep, 2019 - Comments: 5

Earlier this year, JEDEC released the new standard, JESD209–5, Low Power Double Data Rate 5 (LPDDR5). Those that contributed to the development of the standard come from a diverse technology background and represent both manufacturers and consumers of SDRAM memories. Now we have a new memory standard to help enable the future that requires more compute power, higher reliability, and lower pow... » read more

Challenges To Building Level 5 Automotive Chips
By Ann Mutschler - 05 Sep, 2019 - Comments: 0

It’s an exciting time in the automotive space, and this is especially true when it comes to all of the activity around autonomous driving and the path to achieving full Level 5 autonomy. The technology is complex, the ecosystem seems to get more complex by the day, and simulating autonomous systems safely makes this an extremely fascinating area from an engineering perspective. At the heart o... » read more

IP’s Growing Impact On Yield And Reliability
By Ann Mutschler - 04 Sep, 2019 - Comments: 0

Chipmakers are finding it increasingly difficult to achieve first-pass silicon with design IP sourced internally and from different IP providers, and especially with configurable IP. Utilizing poorly qualified IP and waiting for issues to appear during the design-to-verification phase just before tape-out can pose high risks for design houses and foundries alike in terms of cost and time to... » read more

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