Introducing An Agentic LLM For Chip Design


By Tanay Biradar, Surya Gunukula, Tengxiao Liu, and Kexun Zhang ChipAgents has introduced Renoir, an agentic large language model (LLM) whose name means "renew." In early chip design benchmarks, Renoir outperforms the base model it was trained on and cuts costs by more than half. Furthermore, it can run entirely on-premises, allowing semiconductor companies to develop faster without compromi... » read more

Building An AI Chip: Silicon Design And Advanced Packaging


AI has become a key driver for the semiconductor industry as it is applied to ever more aspects of daily life. Many startups and established vendors are designing AI chips to accelerate algorithms and yield the best results. AI designs are large and complex, requiring advanced process nodes and putting stress on every step of the development process. Multi-die, or chiplet-based, design is becom... » read more

Benchmark For AI-Aided Chip Design That Evaluates LLMs Across 3 Critical Tasks (UCSD, Columbia)


Researchers at UCSD and Columbia University published "ChipBench: A Next-Step Benchmark for Evaluating LLM Performance in AI-Aided Chip Design." Abstract "While Large Language Models (LLMs) show significant potential in hardware engineering, current benchmarks suffer from saturation and limited task diversity, failing to reflect LLMs' performance in real industrial workflows. To address t... » read more