Issues In Designing 5G Beamforming Antennas


As 5G networking inches closer to reality, one of the more stubborn problems also will be one of the smallest. Several issues have yet to be cracked with beamforming and massive MIMO antennas, which will make millimeter wave (mmWave) spectrum—a key ingredient in 5G networks—work on multiple devices and base-station locations. Millimeter wave is problematic yet promising. Between bands 30... » read more

Week In Review: Design, Low Power


Tools & IP OneSpin revealed its latest formal app, Connectivity XL, providing formal connectivity checking to 7nm, multi-billion gate SoC designs. The app generates detailed connectivity specification tables from abstract connectivity specs through a dedicated checking engine that integrates structural and formal analysis to perform on-the-fly, automated abstractions. It supports verificat... » read more

Week In Review: Design, Low Power


M&A Ansys will acquire Helic, a provider of electromagnetic crosstalk analysis and signoff tools. Founded in 2000, Helic's tools included pre- and post-LVS EM modeling, inductor synthesis and modeling, and analysis of crosstalk risk. The company's technology will be integrated into a solution for on-chip, 3D integrated circuit and chip-package-system electromagnetics and noise analysis. Th... » read more

Blog Review: Jan. 23


Synopsys' Taylor Armerding investigates what's happened with the Stuxnet malware since 2010, when it destroyed hundreds of centrifuges at an Iranian nuclear enrichment facility. Cadence's Paul McLellan provides an update on the current state of EUV and what's needed to make high-volume manufacturing possible. In a video, Mentor's Colin Walls explains software's role in embedded system pow... » read more

Planning For 5G And The Edge


Semiconductor Engineering sat down to discuss 5G and edge computing with Rahul Goyal, vice president in the technology and manufacturing group at Intel; John Lee, vice president and general manager of the semiconductor business unit at ANSYS; Rob Aitken, R&D fellow at Arm; and Lluis Paris, director of IP portfolio marketing at TSMC. What follows are excerpts of that conversation. Part one i... » read more

Power Issues Rising For New Applications


Managing power in chips is becoming more difficult across a wide range of applications and process nodes, forcing chipmakers and systems companies to rethink their power strategies and address problems much earlier than in the past. While power has long been a major focus in the mobile space, power-related issues now are spreading well beyond phones and laptop computers. There are several re... » read more

Process Variation And Aging


Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; and Naseer Khan, vice president of sales at M... » read more

An Integrated Simulation Platform to Validate Autonomous Vehicle Safety


Autonomous driving systems rely upon sensors and embedded software for localization, perception, motion planning and execution. Autonomous driving systems can only be released to the public after developers have demonstrated their ability to achieve extremely high levels of safety. Today’s hands-off autonomous driving systems are largely built with deep learning algorithms that can be trained... » read more

Blog Review: Jan. 16


Mentor's Harry Foster takes a look at how quickly FPGAs are adopting recent verification techniques, with formal gaining at a rapid pace. Cadence's Paul McLellan checks out the details of two new RISC-V based cores: Western Digital's open source SweRV and Esperanto's Maxion. Synopsys' Taylor Armerding digs into a recent cybersecurity report from the U.S. government and finds a troubling n... » read more

Blog Review: Jan. 9


Cadence's Paul McLellan considers the challenges facing copper interconnects as resistance gets harder to deal with and the pros and cons of potential replacement materials. Mentor's Harry Foster digs into how FPGA design and verification engineers spend their time, and why the time designers spend designing has increased. Synopsys' Taylor Armerding contends that the way we use passwords ... » read more

← Older posts Newer posts →