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Manufacturing Bits: July 13


Heterogenous III-V packaging At the recent 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), a group presented a paper on the development of a wafer-level fan-out package using heterogenous III-V devices. This paper deals with the packaging of two III-V chips for use in RF transceiver applications in base stations. III-V Lab, CEA-Leti, Thales and United Monolithic Semic... » read more

The Week In Review: Manufacturing


Packaging and test A*STAR’s Institute of Microelectronics (IME) has formed a fan-out wafer-level packaging consortium comprising of OSATs, materials vendors, equipment suppliers and others. The group is called the FOWLP Development Line Consortium. As part of the announcement, Singapore’s IME has established a development line to accelerate the development of fan-out. Located in IME’s... » read more

SEMICON Taiwan’s Packaging Punch


SEMICON Taiwan packed a punch, setting several new records and new heights in 2015. This year marked the 20th anniversary of SEMICON in Taiwan and was the largest SEMICON in Taiwan ever, with a Nobel Prize winner (Professor Shuji Nakamura, 2014’s winner) keynoting the Executive Summit, Taiwan’s President Ma speaking at the hugely attended Gala Dinner, and 2015 on track for TSMC to be the wo... » read more