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Interconnects Emerge As Key Concern For Performance


Interconnects are becoming increasingly challenging to design, implement and test as the amount of data skyrockets and the ability to move that data through denser arrays of compute elements and memories becomes more difficult. The idea of an interconnect is rather simple, but ask two people what constitutes an interconnect and you're likely to get very different answers. Interconnects are e... » read more

The Week In Review: Oct. 4


By Mark LaPedus & Ed Sperling eSilicon introduced an automated multi-project wafer quote system, which allows companies to sort through a number of options and get pricing. The quotes are tied into TSMC's 20nm to 350nm processes, and GlobalFoundries’ 20nm to 180nm processes. The approach eliminates the need for companies to buy a full wafer if their volume requirements don’t warrant it... » read more