tag: Breker

Verification As A Flow (Part 1)
By Brian Bailey - 05 Jul, 2018 - Comments: 2

Semiconductor Engineering sat down to discuss the transformation of verification from a tool to a flow with Vladislav Palfy, global manager application engineering for OneSpin Solutions; Dave Kelf, chief marketing officer for Breker Verification Systems; Mark Olen, product marketing group manager for Mentor, A Siemens Business; Larry Melling, product management director, System & Verificati... » read more

FPGAs Becoming More SoC-Like
By Ann Mutschler - 04 Jun, 2018 - Comments: 1

FPGAs are blinged-out rockstars compared to their former selves. No longer just a collection of look-up tables (LUTs) and registers, FPGAs have moved well beyond into now being architectures for system exploration and vehicles for proving a design architecture for future ASICs. This family of devices now includes everything from basic programmable logic all the way up to complex SoC devices.... » read more

Can Big Data Help Coverage Closure?
By Brian Bailey - 22 Mar, 2018 - Comments: 0

Semiconductor designs are a combination of very large numbers and very small numbers. There is a large numbers of transistors at very small sizes, and databases are often large. The chip industry has been looking at [getkc id="305" kc_name="machine learning"] to effectively manage some of this data, but so far datasets have not been properly tagged across the industry and there is a reluctan... » read more

Merging Verification With Validation
By Brian Bailey - 22 Mar, 2018 - Comments: 3

Verification and validation are two important steps in the creations of electronic systems and over time their roles, but how they play together is changing. In fact, today we are seeing a major opportunity for rethinking this aspect of the flow, which could mean the end of them as separate tasks for many of the chips being created. As with many things in this industry, however, squeezing it... » read more

Verification Of Functional Safety (Part 2)
By Brian Bailey - 22 Feb, 2018 - Comments: 0

The automotive industry is grappling with a tradeoff between cost and safety. Safety is well understood in industries that are cost-insensitive, such as aerospace and medical, and the consumer industry has a long track record of driving down costs while increasing functionality. But can these two industries be brought together in a safe and effective manner to enable automobiles to achieve the ... » read more

Predictions: Methodologies And Tools
By Brian Bailey - 25 Jan, 2018 - Comments: 0

Predictions are divided into four posts this year. Part one covered markets and drivers. The second part looked at manufacturing, devices and companies and this part will cover methodologies and tools. In addition, the outlook from EDA executives will be provided in a separate post. Intellectual property As designs get larger, it should be no surprise that the size of the [getkc id="43" kc_... » read more

Getting Serious About Chiplets
By Ann Mutschler - 08 Jan, 2018 - Comments: 0

Demand for increasingly complex computation, more features, lower power, and shorter lifecycles are prompting chipmakers to examine how standardized hard IP can be used to quickly assemble systems for specific applications. The idea of using chiplets, with or without a package, has been circulating for at least a half-dozen years, and they can trace their origin back to IBM's packaging schem... » read more

Reflection On 2017: Design And EDA
By Brian Bailey - 03 Jan, 2018 - Comments: 0

People love to make predictions, and most of the time they have it easy, but at Semiconductor Engineering, we ask them to look back on the predictions they make each year and to assess how close to the mark they were. We see what they missed and what surprised them. Not everyone accepts our offer to grade themselves, but most have this year. (Part one looked at the predictions associated with s... » read more

Which Verification Engine?
By Ed Sperling - 02 Jan, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss the state of verification with Jean-Marie Brunet, senior director of marketing for emulation at [getentity id="22017" e_name="Mentor, a Siemens Business"]; Frank Schirrmeister, senior group director for product management at [getentity id="22032" e_name="Cadence"]; Dave Kelf, vice president of marketing at [getentity id="22395" e_name="OneSpin Solut... » read more

Which Verification Engine? (Part 2)
By Ed Sperling - 06 Dec, 2017 - Comments: 1

Semiconductor Engineering sat down to discuss the state of verification with Jean-Marie Brunet, senior director of marketing for emulation at [getentity id="22017" e_name="Mentor, a Siemens Business"]; Frank Schirrmeister, senior group director for product management at [getentity id="22032" e_name="Cadence"]; Dave Kelf, vice president of marketing at [getentity id="22395" e_name="OneSpin Solut... » read more

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