Blog Review: July 5


Cadence's Paul McLellan checks out the current state of System-in-Package technology and how different products incorporate SiP. Synopsys' Robert Vamosi digs into the differences between two major recent ransomware outbreaks, WanaCry and Petya. A Mentor staff writer shares some highlights from this year's DAC. ARM's Rene Haas examines what consumers think about AI and the impact it wil... » read more

Verification Unification


Semiconductor Engineering brought together industry luminaries to initiate the discussion about the role that formal technologies will play with the recently released early adopter's draft of Portable Stimulus and how it may help to bring the two execution technologies closer together. Participating in this roundtable are Joe Hupcey, verification product technologist for [getentity id="22017" e... » read more

EDA Moves Out Of The Shadows


EDA has long harbored ambitions that are larger than a piece of silicon. The engineering challenges being solved on a nanometric scale are remarkably similar to ones being solved at a much higher level—architectural design, layout, validation, verification, debug, thermal mapping, and a lot more. The problem, at least until recently, is that it has been difficult to gain a foothold in larg... » read more

Machine Learning Meets IC Design


Machine Learning (ML) is one of the hot buzzwords these days, but even though EDA deals with big-data types of issues it has not made much progress incorporating ML techniques into EDA tools. Many EDA problems and solutions are statistical in nature, which would suggest a natural fit. So why is it so slow to adopt machine learning technology, while other technology areas such as vision recog... » read more

DAC 2017: A Glimpse Of How The Future Is Enabled


Last week’s Design Automation Conference in Austin gave great examples on how the future is enabled with next generation tools today. My favorite portions were Uhnder’s overview on “Agile Emulation” in the cloud, SirusXM’s presentation on how they used our portfolio of emulation and FPGA-based prototyping, the panel on “Smarter Verification” that I had organized and – of course ... » read more

Verification In The Cloud


By Ed Sperling Leasing of cloud-based verification resources on an as-needed basis is finally beginning to gain traction after more than a decade of false starts and over-optimistic expectations. All of the major EDA vendors now offer cloud-based services. They view this as a way of either supplementing a chipmaker's existing resources at various peak use times, or for small and midsize com... » read more

Hybrid Emulation


Semiconductor Engineering sat down to discuss the growing usage of hybrid verification approaches with Frank Schirrmeister, senior group director of product management & marketing for [getentity id="22032" e_name="Cadence"]; Russ Klein, program director for pre-silicon debug products at [getentity id="22017" e_name="Mentor, a Siemens Business"]; [getperson id="11027" comment="Phil Moorby"],... » read more

Choosing The Right Superlinting Technology For Early RTL Code Signoff


No one can afford to go through weeks of verification only to discover problems in the register- transfer level (RTL) code that might not be functionally wrong, but do not follow established rules for successful implementation. Traditional lint tools have become ineffective in evaluating RTL code for today’s larger, more complex designs. However, superlinting technology, such as the Cadence J... » read more

Blog Review: June 28


Mentor's Craig Armenti notes the benefits, and challenges, of investing in modular design in the PCB domain. Cadence's Paul McLellan covers a DAC chat with CEO Lip-Bu Tan on the rise of advanced packaging and investments in AI and autonomous driving. Synopsys' Jim Hartnett examines some of the challenges and tradeoffs involved in building good security practices in hospital environments. ... » read more

Verification And The IoT


Semiconductor Engineering sat down to discuss what impact the IoT will have on the design cycle, with Christopher Lawless, director of external customer acceleration in [getentity id="22846" e_name="Intel"]'s Software Services Group; David Lacey, design and verification technologist at Hewlett Packard Enterprise; Jim Hogan, managing partner at Vista Ventures; Frank Schirrmeister, senior group d... » read more

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