tag: Cadence

Blog Review: May 11
By Jesse Allen - 11 May, 2016 - Comments: 0

Cadence's Christine Young presents two views on the challenges of teaching physical design and some creative approaches to get students involved in solving complex problems. In his latest video, Mentor's Colin Walls ponders the mysteries of the increment operator in C/C++ and how to use it most efficiently. Synopsys' Anand Shirahatti, Mohd Adil Khan, and Jamshed Alum look at two key featu... » read more

The Week In Review: Design/IoT
By Jesse Allen - 06 May, 2016 - Comments: 0

Standards The IEEE launched the International Roadmap for Devices and Systems (IRDS), effectively setting the industry agenda for future silicon benchmarking and adding metrics that are relevant to specific markets rather than creating the fastest general-purpose processing elements at the smallest process node. For more on the IRDS, check out Ed Sperling's analysis. Accellera's SystemC A... » read more

Autonomous Vehicle Disruptions Ahead
By Ann Mutschler - 05 May, 2016 - Comments: 1

The promise of autonomous driving is a significant one, with far fewer fatalities from vehicle crashes — down from 30,000 annually — topping the list of benefits. Beyond that, autonomous driving also promises increased convenience and productivity and less troublesome commutes. But autonomous driving also pushes automotive technology into uncharted areas. There is little to fall back on ... » read more

End Of Mixed Signal Engineering?
By Ed Sperling - 04 May, 2016 - Comments: 1

EDA companies are stepping back after years of trying to force engineers to combine analog and digital disciplines. Rather than emphasizing [getkc id="38" kc_name="mixed signal"] as a single expertise, they are building bridges and translation mechanisms between the two worlds. The moves cap more than a decade of trying to find optimal ways to pack [getkc id="37" kc_name="analog"] and digita... » read more

Blog Review: May 4
By Jesse Allen - 04 May, 2016 - Comments: 0

Ready for a scuba-diving robot? Also in this week's top picks, Ansys' Justin Nescott highlights the latest, strange discovery about water plus the race to Mars. From depositing a check via smartphone to the throwaway culture of smartphones themselves, letting convenience trump security is dangerous, warns Cadence's Paul McLellan. Synopsys' Robert Vamosi looks at the sad demise of Hitomi, ... » read more

Automating System Design
By Ann Mutschler - 02 May, 2016 - Comments: 1

Change is underway in the chip design world, creating opportunities and challenges that reach far beyond questions about whether Moore’s Law is slowing or stopping. Never before in the history of semiconductors has design been so complex and sophisticated, and never has it touched so many lives in so many interesting ways. This is all happening as a result of the chip’s enabling role in ... » read more

The Week In Review: Design/IoT
By Jesse Allen - 29 Apr, 2016 - Comments: 0

IP & Chips Synopsys debuted MIPI I3CSM controller IP, which incorporates in-band interrupts within the 2-wire interface to deliver low pin count. The IP supports all data rates up to 26.7 Mbps, dynamic address allocation, multi-master operations and 32-bit ARM AMBA Advanced Peripheral Bus slave interface. Marvell unveiled a family of Ethernet transceivers fully optimized for 2.5Gbps a... » read more

ESL Flow is Dead
By Brian Bailey - 28 Apr, 2016 - Comments: 3

It was 20 years ago that Gary Smith coined the term [getkc id="48" comment="Electronic System Level"] (ESL). He foresaw the next logical migration in abstraction up from the [getkc id="49" comment="Register Transfer Level"] (RTL) to something that would be capable of describing and building complex electronic systems. He also saw that the future of EDA depended upon who would control that marke... » read more

Bridging Hardware And Software
By Ann Mutschler - 28 Apr, 2016 - Comments: 1

The barriers between hardware and software design and verification are breaking down with more intricately integrated systems, bringing together different disciplines and tools. But there are lingering questions about exactly what this shift means design methodologies, team interactions, and what kind of training will be required in the future. Playing heavily into this is the fact that toda... » read more

System-Level Verification Tackles New Role
By Brian Bailey - 28 Apr, 2016 - Comments: 0

Wally Rhines, chairman and CEO of Mentor Graphics, gave the keynote at DVCon this year. He said that if you pull together a bunch of pre-verified IP blocks, it does not change the verification problem at the system level. That sounds like a problem. There are assumptions made that the IP blocks work to a reasonable degree, and that when performing system-level verification the focus is not a... » read more

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