tag: Cadence

Stories From The Village Called Hardware-Assisted Development
By Frank Schirrmeister - 28 Apr, 2016 - Comments: 0

They say it takes a village to raise children and, as a dad of an 11-year-old girl, I can relate. Similarly, for system development and hardware-assisted verification, the overall ecosystem of users, use models, and partners is equally important. The recent CDNLive Silicon Valley event is a great example. The SoC and Hardware/Software track that my team and I were hosting featured NVIDIA, Netro... » read more

Plan-Based Analog Verification Methodology
By Cadence - 27 Apr, 2016 - Comments: 0

The ability to verify all the aspects of an analog design and to keep track of all the different verification tasks is a growing challenge. Manual attempts to do so often lead to mistakes since they rely on constantly updated documents. The Cadence Virtuoso ADE Verifier provides an overarching verification plan that links to all analog tests across multiple designers. The Virtuoso ADE Verifie... » read more

Blog Review: April 27
By Jesse Allen - 27 Apr, 2016 - Comments: 0

In a video, Cadence's Chris Rowan looks at the future of neural networks, particularly the shift from cloud-based to embedded devices and what we can increasingly expect from them. Waiting for RTL? Mentor's Rich Edelman suggests a way to get tests that are missing some simple RTL running with a bit of SystemVerilog. Synopsys' Richard Solomon provides a primer on calculating the bandwidth ... » read more

2.5D Becomes A Reality
By Ed Sperling - 27 Apr, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss 2.5D and advanced packaging with Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; John Shin, vice president at [getentity id="22903" e_name="Marvell"]; Bill Isaacson, director of ASIC marketing at [getentity id="22242" e_name="eSilicon"]; Frank Ferro, senior di... » read more

Are Simulation’s Days Numbered?
By Brian Bailey - 26 Apr, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss the limitations of simulation in more complex designs with [getperson id="11049" comment="Michael McNamara"], CEO of [getentity id="22716" comment="Adapt-IP”]; Pete Hardee, product management director at [getentity id="22032" e_name="Cadence"]; David Kelf, vice president of marketing for for [getentity id="22395" e_name="OneSpin Solutions"]; Lauro... » read more

Cadence CDNLive Keynote Address: Thoughts and Implications
By Rich Wawrzyniak - 21 Apr, 2016 - Comments: 0

I attended the Cadence CDNLive conference at the Santa Clara Convention Center on April 5 and 6 and had a chance to listen to four very thought-provoking presentations given by the speakers. These presentations were combined to follow the keynote address given by Cadence CEO, Lip-Bu Tan and addressed several different aspects of the current semiconductor industry landscape. Speakers Lip-... » read more

The Future Of MEMS Sensor Design And Manufacturing
By Stephen Breit - 21 Apr, 2016 - Comments: 0

I recently gave an invited talk at the IEEE Inertial Sensors 2016 symposium that discussed the future of commodity MEMS inertial sensor design and manufacturing. Inertial sensors comprise one of the fastest growing and most successful segments of the MEMS market. There are three industry trends that I believe will have major implications for motion sensor design and manufacturing and, more g... » read more

Blog Review: April 20
By Jesse Allen - 20 Apr, 2016 - Comments: 0

Synopsys' Michael Posner digs into the relationships between USB Type-C, USB 3.1, Power Delivery and DisplayPort specifications. Cadence's Paul McLellan listens in on a discussion of the memory market's growth in China, and what's on the horizon. Mentor's Andy Macleod looks at the challenges that come with the increased car customization consumers are demanding. An energy-harvesting, t... » read more

Rightsizing Challenges Grow
By Ed Sperling - 20 Apr, 2016 - Comments: 0

Rightsizing chip architectures is getting much more complicated. There are more options to choose from, more potential bottlenecks, and many more choices about what process to use at what process node and for which markets and price points. Rightsizing is a way of targeting chips to specific application needs, supplying sufficient performance while minimizing power and cost. It has been a to... » read more

Convolutional Neural Networks Power Ahead
By Ann Mutschler - 18 Apr, 2016 - Comments: 0

While the term may not be immediately recognizable, convolutional neural networks (CNNs) are already part of our daily lives—and they are expected to become even more significant in the near future. [getkc id="261" kc_name="Convolutional neural networks"] are a form of machine learning modeled on the way the brain's visual cortex distinguishes one object from another. That helps explain wh... » read more

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