Open-Source RISC-V Platform Trains Chip Designers From RTL To Silicon (ETH Z., lowRISC, U of Bologna)


Researchers from ETH Zurich, lowRISC, and University of Bologna published a technical paper titled “Croc: Training the Next Generation Chip Designers on Domain-Specific End-to-End Open Source Silicon.” This paper describes Croc, an open-source, customizable RISC-V SoC platform and teaching flow that lets students take domain-specific chip-design projects from architecture and RTL through... » read more

LLM-Based Learning Platform For Chip Design Education (RPTU)


RPTU University of Kaiserslautern-Landau researchers published "From RTL to Prompt Coding: Empowering the Next Generation of Chip Designers through LLMs." Abstract "This paper presents an LLM-based learning platform for chip design education, aiming to make chip design accessible to beginners without overwhelming them with technical complexity. It represents the first educational platform... » read more