EUV’s Future Looks Even Brighter


The rapidly increasing demand for advanced-node chips to support everything-AI is putting pressure on the industry's ability to meet demand. The need for cutting-edge semiconductors is accelerating in applications ranging from hyperscale data centers powering large language models to edge AI in smartphones, IoT devices, and autonomous systems. But manufacturing those chips relies heavily on ... » read more

IC Equipment Communication Standards Struggle As Data Volumes Grow


The tsunami of data produced during wafer fabrication cannot be effectively leveraged without standards. They determine how data is accessed from equipment, which users need data access and when, and how fast it can be delivered. On top of that, best practices in data governance and data quality are needed to effectively interpret collected data and transfer results. When fab automation and ... » read more

Electrifying Everything: Power Moves Toward ICs


As electronic systems grow increasingly complex and energy-intensive, traditional power management methods — centered on centralized systems and external components — are proving inadequate. The next wave of innovation is to bring power control closer to the action — directly on the chip or into a heterogeneous package. This change is driven by a relentless pursuit of efficiency, scala... » read more

Using Test And Metrology Data For Dynamic Process Control


Advanced packaging is transforming semiconductor manufacturing into a multi-dimensional challenge, blending 2D front-end wafer fabrication with 2.5D/3D assemblies, high-frequency device characterization, and complex yield optimization strategies. These combinations are essential to improving performance and functionality, but they create some thorny issues for which there are no easy fixes. ... » read more

Chip Industry Week In Review


Global semiconductor sales hit $57.8 billion in November 2024, an increase of 20.7% compared to the same month last year, according to the Semiconductor Industry Association. In U.S. government news: The U.S. Department of Commerce finalized up to $325 million in CHIPS Act funding for Hemlock Semiconductor, which will support construction of a new semiconductor-grade polysilicon manufac... » read more

Chip Industry Week In Review


Updated for 12/20 government fundings and 12/23 for China trade investigation announcements. President Biden announced a trade investigation into "China's unfair trade practices in the semiconductor sector."  The announcement stated "PRC semiconductors often enter the U.S. market as a component of finished goods. This Section 301 investigation will examine a broad range of the PRC’s non-m... » read more

Delivering On Power During HPC Test


The industry’s insatiable need for power in high-performance computing (HPC) is creating problems for test cells, which need to deliver very high currents at very consistent voltage levels through the power delivery network (PDN). In response, ATE, wafer probe, and contactor vendors are introducing some innovative approaches and test procedures that can ensure robust power delivery to ATE pro... » read more

Week In Review: Manufacturing, Test


Market research For some time, the semiconductor industry has experienced acute shortages. The automotive industry has suffered the most. When will this all end? “Shortages have become more acute for many products in the near term because the growth in demand is greater than the increase in wafer and packaging capacity that was anticipated by the foundry and semiconductor vendors. To date... » read more

Cleaning Up During IC Test


Test is a dirty business. It can contaminate a unit or wafer, or the test hardware, which in turn can cause problems in the field. While this has not gone unnoticed, particularly as costs rise due to increasing pin and ball density, and as more chips are bundled together in a package, the cost of dirt continues to be a focus. Cleaning recipes for test interface boards are changing, and analy... » read more

Digging Much Deeper With Unit Retest


Keeping test costs flat in the face of product complexity continues to challenge both product and test engineers. Increased data collection at package-level test and the ability to respond to it in a never-before level of detail has prompted device makers and assembly and test houses to tighten up their retest processes. Test metrology, socket contamination, and mechanical alignment have alw... » read more

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