tag: EDA

ESL Flow is Dead
By Brian Bailey - 28 Apr, 2016 - Comments: 3

It was 20 years ago that Gary Smith coined the term [getkc id="48" comment="Electronic System Level"] (ESL). He foresaw the next logical migration in abstraction up from the [getkc id="49" comment="Register Transfer Level"] (RTL) to something that would be capable of describing and building complex electronic systems. He also saw that the future of EDA depended upon who would control that marke... » read more

Analyzing The Integrity Of Power
By Ann Mutschler - 14 Apr, 2016 - Comments: 0

Power analysis is shifting much earlier in the chip design process, with power emerging as the top design constraint at advanced process nodes. As engineering teams pack more functionality and content into bigger and more complex chips, they are having to deal with more complex interactions that affect everything from power to its impact on signal integrity and long-term reliability. That, i... » read more

EDAC Changes Name
By Ed Sperling - 31 Mar, 2016 - Comments: 1

The EDA Consortium today changed its name to the Electronic System Design Alliance, a move that expands the group's charter to reflect shifts that have been underway in the chip design world for some time. Those shifts include the growth in IP and an increased focus on software development. Classic EDA, from place and route to synthesis to back-end debug and verification, are still very much... » read more

EDA Sales Down Slightly
By Ed Sperling - 24 Mar, 2016 - Comments: 0

EDA sales dropped 1.9% in Q4 of 2015, following a spectacular run of 23 consecutive quarters of solid growth. For the year, the EDA and IP industry posted 5% growth. It's hard to read too much into a single quarter, especially when growth for the full year was up 5%, according to numbers released by the EDA Consortium's Market Statistics Service. Computer-aided engineering (CAE), the largest... » read more

What’s Next for System-Level Power Modeling?
By Alan Gibbons - 23 Mar, 2016 - Comments: 1

Availability of models and libraries has long been one of the biggest barriers to the adoption of new EDA tools and methodologies, whether due to the investment needed to create these models and libraries or because of the “at-risk” nature of developing complex models in proprietary formats. With the approval of UPF3.0 (IEEE 1801-2015) this past December, we now have an industry standar... » read more

Inside The OSAT Business
By Mark LaPedus - 17 Mar, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss the IC-packaging industry, foundries, China and other topics with Tien Wu, chief operating officer at Taiwan's Advanced Semiconductor Engineering (ASE), the world's largest outsourced semiconductor assembly and test (OSAT) vendor. What follows are excerpts of that conversation. SE: What is your overall outlook for 2016? Wu: Last year, the semi... » read more

IP Risk Sharing
By Brian Bailey - 10 Mar, 2016 - Comments: 0

For most people within the semiconductor industry, managing risk involves making the right product decisions that will enable a company to be profitable, and ensuring the product is successfully produced within the necessary time window. In contrast, for products within high-risk areas such as medical and mil/aero, design often proceeds at a slower pace, using proven technologies and adopting l... » read more

Verification Facing Unique Inflection Point
By Brian Bailey - 10 Mar, 2016 - Comments: 0

The Design and Verification Conference and Exhibition (DVCon) attracted more than 1,100 people to San Jose last week, just slightly less than last year. While a lot of focus, and most of the glory, goes to design within semiconductor companies, it is verification where most of the advancements are happening and thus the bigger focus for DVCon. The rate of change in verification and the producti... » read more

Powerful New Standard
By Brian Bailey - 02 Mar, 2016 - Comments: 1

In December 2015, the IEEE released the latest version of the 1801 specification, titled the IEEE standard for design and verification of low-power integrated circuits, but most people know it as UPF or the Unified Power Format. The standard provides a way to specify the power intent associated with a design. With it, a designer can define the various power states of the design and the contexts... » read more

What’s After Smartphones?
By Ed Sperling - 25 Feb, 2016 - Comments: 2

One of the unique things about the semiconductor industry is that it has fueled the digital revolution almost entirely by focusing on its core competencies of performance, power and area. There are few, if any, industries that can tie global growth and success to what amounts to an almost isolationist business model. Salespeople have to sell those chips, of course. Marketers have to create ... » read more

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