Tech Talk: SoC Protocol Debug


Bernie DeLay, group director for verification IP R&D at Synopsys, talks about what goes wrong in complex SoCs, how so-called standard pieces play together, and where are the gotchas in re-use. [youtube vid=AaY_AmdjUpo] » read more

What ESL Is Really About


There has been an almost constant disagreement between the generally held view about what ESL is and my own views on the subject. It is not completely surprising, given that I have spent most of my time as a verification specialist working within the EDA industry. EDA has been driven by design, and all of the largest EDA companies grew out of advances on the design side. [getkc id="10" kc_na... » read more

The Price Of Consolidation


Consolidation is causing far-reaching changes across the global semiconductor ecosystem due to the size of companies being bought and the dearth of startups to replenish those being acquired. Coupled with the rising cost and difficulty of shrinking features down to advanced process nodes—many argue that is the largest driver of consolidation—the market dynamics for who's buying IP, EDA t... » read more

ESL: 20 Years Old, 10 To Go


It is a common perception that the rate of technology adoption accelerates. In 1873, the telephone was invented and, after 46 years, it had been adopted by one-quarter of the U.S. population. Television, invented in 1926 took 26 years. The PC in 1975 took just 16 years. It took only 7 years after the introduction of the Internet in 1991 before it was seeing significant levels of adoption. So... » read more

Mentor Buys Remainder Of Calypto


Back in 2002, a small startup company decided to tackle one of the most difficult problems in EDA—one that, if solved, could have opened up a whole new level of abstraction. Back when [getkc id="29" kc_name="logic synthesis"] was the new tool to try out, it suffered from the fact that gate-level [getkc id="11" kc_name="simulation"] had to be performed on the output, even if the input had been... » read more

Tech Talk: Power Emulation


Jean-Marie Brunet, marketing director for Mentor Graphics' Emulation Division, talks about why hardware-assisted verification is now required for power and where it works best. [youtube vid=Mb63cbjbZ_I] » read more

Shift In Focus For Low Power Design


The increased levels of interest we have seen over the last couple of years in system-level power modeling and energy-aware system-level design methodology, coupled with broad participation in the associated industry standard activities around system level power, gives us a clear indication that a shift in focus for low-power design is taking place. Our attempts to deliver energy-efficient high... » read more

Making Hardware Design More Agile


Semiconductor engineering sat down to whether changes are needed in hardware design methodology, with Philip Gutierrez, ASIC/FPGA design manager in [getentity id="22306" comment="IBM"]'s FlashSystems Storage Group; Dennis Brophy, director of strategic business development at [getentity id="22017" e_name="Mentor Graphics"]; Frank Schirrmeister, group director for product marketing of the System ... » read more

Software Driving More Hardware Designs


The influence of software engineers is growing inside of chip and systems companies, reversing a decades-old trend of matching the software to the fastest or most power-efficient hardware and raising as-yet unanswered questions about what will change in SoC design. The shift is particularly evident in chips developed for high-volume markets such as mobile phones and tablets. It's also happen... » read more

Why Implementation Matters To System Design And Software


There has been quite some discussion in the recent past how well abstraction really works in enabling system design and verification. As I admitted in “Confessions of an ESL-Aholic” a while back, I have revised my view significantly over the years. While thinking originally of abstraction more as an panacea, it turns out that important decisions and analyses, such as for power and performan... » read more

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