tag: ESL

Tale Of Two HLS Viewpoints
By Brian Bailey - 09 Jul, 2015 - Comments: 0

The Design Automation Conference attracts several co-located conferences, symposiums and other such gathering of people, often on more specialized topics than would appeal to the general DAC attendees. Some of them are more research-focused, but one conference is somewhat strange in that it is about a subject that has transitioned to commercial tool development and yet still remains an active a... » read more

Problems Ahead for EDA
By Brian Bailey - 19 May, 2015 - Comments: 0

Semiconductor Engineering sat down with [getperson id="11411" comment="Bill Neifert"], chief technology officer at [getentity id="22521" comment="Carbon Design Systems"]; [getperson id="11032" comment="Simon Davidmann”], chief executive officer for [getentity id="22036" e_name="Imperas”]; Randy Smith, vice president of marketing for [getentity id="22605" e_name="Sonics"] and Michel Courtoy,... » read more

Bigger Systems, Bigger Profits
By Ed Sperling - 29 Jan, 2015 - Comments: 0

Markets work in very mysterious ways. Technology that should be a slam dunk—think 2.5D with its promise of re-usable analog IP and faster performance, for example—are still hobbling along because no one wants to deal with the risk of a new architectural and manufacturing approach. They haven't even shown up yet in servers, where price is almost irrelevant. At the same time (no pun intended)... » read more

Tools And Flows In 2015
By Brian Bailey - 29 Jan, 2015 - Comments: 0

This year more than 26 people provided predictions for 2015. Most of these came from the EDA industry, so the results may be rather biased. However, ecosystems are coming closer together in many parts of the semiconductor food chain, meaning that the EDA companies often can see what is happening in dependent industries and in the system design houses. Thus their predictions may have already res... » read more

Virtual Prototyping Takes Off
By Ed Sperling - 25 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss [getkc id="104" kc_name="virtual prototyping"] with Barry Spotts, senior core competency FAE for fabric and tools at [getentity id="22186" comment="ARM"]; Vasan Karighattam, senior director of architecture for SoC and SSW engineering at [getentity id="22664" e_name="Open-Silicon"]; Tom De Schutter, senior product marketing manager for Virtualizer S... » read more

Virtual Prototyping Takes Off
By Ed Sperling - 06 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down with Barry Spotts, senior core competency FAE for fabric and tools at [getentity id="22186" comment="ARM"]; Vasan Karighattam, senior director of architecture for SoC and SSW engineering at [getentity id="22664" e_name="Open-Silicon"]; Tom De Schutter, senior product marketing manager for Virtualizer Solutions at [getentity id="22035" e_name="Synopsys"]; Larry... » read more

How Many Levels Of Abstraction Are Needed?
By Jon McDonald - 23 Oct, 2014 - Comments: 0

Recently I was having a conversation with a user who was creating cycle accurate SystemC models. My initial thought was, "Why would this be necessary?" Through the course of discussions I realized that he did have a design questions that required that level of accuracy and the simulation performance trade-offs were appropriate for his needs. His cycle accurate SystemC models were running at abo... » read more

Are Models Holding Back New Methodologies
By Brian Bailey - 23 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="101" kc_name="modeling"] at abstractions above [getkc id="49" kc_name="RTL"], a factor which has delayed adoption of [getkc id="104" kn_name="virtual prototypes"] and the proliferation of system-level design and hardware/software codesign. Taking part in the discussion were Frank Schirmeister, group director,... » read more

The Real Numbers: Redefining NRE
By Ed Sperling - 26 Sep, 2014 - Comments: 0

Developing ICs at the most advanced nodes is getting more expensive, but exactly how much more expensive is the subject of debate across the semiconductor industry. There are a number of reasons for this discrepancy. Among them: As design flows shift from serial to parallel, it's hard to determine which groups within companies should be saddled with different portions of the bill. The re... » read more

Which Group Should Create System Models?
By Jon McDonald - 26 Jun, 2014 - Comments: 0

One of the factors affecting adoption of a system-level flow is identifying who will do the work to create the system model. For most organizations it's not something they have allocated to a specific group. Generally when an ESL flow is deployed, the software developers, architects and hardware designers will all benefit from the investment, so it would be reasonable that they all contribut... » read more

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