tag: GNN

An FPGA-based Accelerator Addressing Bottlenecks in GNN Preprocessing (KAIST et al.)
By Technical Paper Link - 26 Feb, 2026 - Comments: 0

A new technical paper "AutoGNN: End-to-End Hardware-Driven Graph Preprocessing for Enhanced GNN Performance" was published by researchers at KAIST, Panmnesia, Peking University, Hanyang University, and Pennsylvania State University. Abstract "Graph neural network (GNN) inference faces significant bottlenecks in preprocessing, which often dominate overall inference latency. We introduce Au... » read more

AI Techniques To Solve HW-SW Challenges For Useful Quantum Computing (Nvidia, U. of Oxford et al.)
By Technical Paper Link - 07 Dec, 2025 - Comments: 0

A new technical paper "Artificial intelligence for quantum computing" was published by researchers at NVIDIA, University of Oxford, University of Toronto, Quantum Motion, University of Waterloo et al. Abstract "Artificial intelligence (AI) advancements over the past few years have had an unprecedented and revolutionary impact across everyday application areas. Its significance also extend... » read more

GNN-Based Framework for Hardware Trojan Detection, Including RISC-V Cores
By Technical Paper Link - 26 Jun, 2025 - Comments: 0

A new technical paper titled "TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs" was published by researchers at University of Connecticut and University of Minnesota. Abstract "hip manufacturing is a complex process, and to achieve a faster time to market, an increasing number of untrusted third-party tools and designs from around the world are being utilized. The use of th... » read more

3D IC Partitioning and Placement Method That Optimizes For Critical Paths (POSTECH)
By Technical Paper Link - 12 Sep, 2024 - Comments: 0

A new technical paper titled "TA3D: Timing-Aware 3D IC Partitioning and Placement by Optimizing the Critical Path" was published by researchers at Pohang University of Science and Technology and Baum Design Systems. Abstract "In the face of challenges posed by semiconductor scaling, 3D integration technology has emerged as a crucial solution to overcome the constraints of traditional 2D I... » read more

GNN-Based Pre-Silicon Power Side-Channel Analysis Framework At RTL Level
By Technical Paper Link - 16 Oct, 2023 - Comments: 0

A technical paper titled “SCAR: Power Side-Channel Analysis at RTL-Level” was published by researchers at University of Texas at Dallas, Technology Innovation Institute and University of Illinois Chicago. Abstract: "Power side-channel attacks exploit the dynamic power consumption of cryptographic operations to leak sensitive information of encryption hardware. Therefore, it is necessary t... » read more

Learning The AMS Circuit Representation From Layout Positions (UT Austin/ NVIDIA)
By Technical Paper Link - 15 Mar, 2023 - Comments: 0

A recent technical paper titled "TAG: Learning Circuit Spatial Embedding From Layouts" was published by researchers at UT Austin and NVIDIA. Abstract "Analog and mixed-signal (AMS) circuit designs still rely on human design expertise. Machine learning has been assisting circuit design automation by replacing human experience with artificial intelligence. This paper presents TAG, a new parad... » read more

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