tag: IBM

A New Reference For Low-Power Processors
By Ed Sperling - 09 Sep, 2010 - Comments: 0

By Pallab Chattejee Just how much power can you squeeze out of a processor without destroying performance? Ask IBM. The company introduced a new methodology for power and energy management on its multicore processor chips. The new PowerPC chip, the Power 7, has eight main processor cores each with its own L2 and L3 cache and two central memory controllers. The architecture for the design is... » read more

Changes In The Ecosystem
By Ed Sperling - 09 Sep, 2010 - Comments: 0

By Ed Sperling For the better part of two decades, semiconductor companies have been talking about ecosystems mostly for marketing and economic reasons. They’re now talking thinking about ecosystems for complex technology reasons that involve integrated models for power, transactions and manufacturability. In the late 1990s, IBM began assembling its own loose ecosystem as a way of shieldi... » read more

The Shape Of Things To Come
By Ed Sperling - 26 Aug, 2010 - Comments: 0

By David Lammers Tall or thin? That is the question facing semiconductor companies, now reaching an “intense” phase in development of the vertical finFET and planar ETSOI (extra thin silicon on insulator) transistors for the 22/20nm and 15/14nm technology generations. “This is a conservative industry,” said Raj Jammy, vice president of materials and emerging technologies at Sematech... » read more

Betting On 3D
By Ed Sperling - 26 Aug, 2010 - Comments: 0

The continuation of Moore’s Law appears less in doubt than ever. Companies such as Intel, ST, AMD (via GlobalFoundries) and IBM are testing FinFETS and ETSOI and work is being done on the back end to ensure that these new structures can be manufactured with sufficient yield. What’s changed, though, is the resistance by other companies to the progression of Moore’s Law. There is no long... » read more

Experts At The Table: The Power Problem
By Ed Sperling - 23 Jul, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss the issues in low-power design with Vic Kulkarni, general manager and senior vice president of the RTL business unit, Apache Design Solutions; Pete Hardee, solutions marketing manager at Cadence; Bernard Murphy, chief technology officer at Atrenta, and Bhavna Agrawal, manager of circuit design automation at IBM. What follows are excerpt... » read more

Experts At The Table: The Power Problem
By Ed Sperling - 16 Jul, 2010 - Comments: 0

Low-Power Engineering sat down to discuss the issues in low-power design with Vic Kulkarni, general manager and senior vice president of the RTL business unit, Apache Design Solutions; Pete Hardee, solutions marketing manager at Cadence; Bernard Murphy, chief technology officer at Atrenta, and Bhavna Agrawal, manager of circuit design automation at IBM. What follows are excerpts of that convers... » read more

EUV Focus Shifts To Affordability
By Ed Sperling - 08 Jul, 2010 - Comments: 0

By David Lammers Over the past year, key technologists in the semiconductor industry have come around to believing that EUV lithography will be available for critical mask layers in the next three to five years. What is still up for debate is whether EUV will be cost-effective for low-power consumer SoCs. To penetrate that cost-sensitive market, EUV must overcoming hurdles presented by masks, ... » read more

Keeping Models In Sync
By Ed Sperling - 08 Jul, 2010 - Comments: 0

By Ed Sperling Models and higher levels of abstraction have been hailed as the best choice for developing SoCs at advanced process nodes, but at 28nm and beyond even that approach is showing signs of stress. The number of models needed for a complex SoC has been growing at each new process node, which makes it much more difficult to keep them updated and in sync as the design progresses down t... » read more

Experts At The Table: The Power Problem
By Ed Sperling - 08 Jul, 2010 - Comments: 0

Low-Power Engineering sat down to discuss a broad swath of power issues with Vic Kulkarni, general manager and senior vice president of the RTL business unit, Apache Design Solutions; Pete Hardee, solutions marketing manager at Cadence; Bernard Murphy, chief technology officer at Atrenta, and Bhavna Agrawal, manager of circuit design automation at IBM. What follows are excerpts of that conversa... » read more

Pricey Processes For Low Power
By Ed Sperling - 08 Apr, 2010 - Comments: 0

By Pallab Chatterjee Recently Samsung gave an update on the status and availability of its advanced 32/28nm process technology for use in foundry. The process is targeted for shipping designs to customers at the end of this year, with a road map that continues through the 22/20nm nodes and down to 15nm. What was particularly interesting were several key innovations that have made this all p... » read more

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