Higher Automotive MCU Performance With Interface IP

By Ron DiGiuseppe - 05 Oct, 2023 - Comments: 1

By Ron DiGuiseppe and Hezi Saar AI is making waves across many industries, and automotive is no exception. Today’s vehicles are smarter and more connected than ever, and AI is at the heart of it all. Many new advanced driver assistance system (ADAS) applications, such as automatic emergency braking, adaptive cruise control, and lane-keeping assistance, are built using the latest AI algorit... » read more

Efficient Verification Of Mixed-Signal Series IP Using UVM

By Cadence - 21 Sep, 2022 - Comments: 0

Interface IP are an integral part of systems-on-chips (SoC) that include mobile, automotive, or networking applications and are primarily used for transmitting data over a physical medium between a host and device. The mixed-signal nature of the IP makes verification a challenging task, requiring special considerations for digital and analog sections. This paper describes a robust mixed-signal ... » read more

Leveraging Symbolic Simulations For IO Verification

By Moninder Singh - 14 Oct, 2021 - Comments: 0

IO libraries and interface IPs are an important part of any integrated circuit design that needs to communicate with the outside world or other integrated circuits. Interface IPs are the literal gatekeepers to the flow of logical and electrical information from one IC to another to form today’s complex computer systems, influencing almost every aspect of our lives these days. Interface IPs (e... » read more

Architecting For Optimal Interface IP Integration

By Ann Mutschler - 10 Mar, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss the design and integration of complex interface [getkc id="43" comment="IP"] with Ty Garibay, VP of engineering at Altera; Brian Daellenbach, president of Northwest Logic; Frank Ferro, senior director of product management for memory and interface IP at [getentity id="22671" e_name="Rambus"]; Saman Sadr, director of analog design at Semtech; and Nav... » read more

Architecting For Optimal Interface IP Integration

By Ann Mutschler - 04 Dec, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the design and integration of complex interface IP with Ty Garibay, VP of engineering at Altera; Brian Daellenbach, president of Northwest Logic; Frank Ferro, senior director of product management for memory and interface IP at Rambus; Saman Sadr, director of analog design at Semtech; and Navraj Nandra, senior director of marketing for analog/mixed ... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: interface IP

Higher Automotive MCU Performance With Interface IP

Efficient Verification Of Mixed-Signal Series IP Using UVM

Leveraging Symbolic Simulations For IO Verification

Architecting For Optimal Interface IP Integration

Architecting For Optimal Interface IP Integration