tag: IP

USB 3.1: Evolution And Revolution
By Various Writers - 12 Mar, 2014 - Comments: 0

USB-IF Worldwide Developers Days introduced developers to the new USB 3.1 specification. On the surface, USB 3.1 seems like it could be only an update to 10G speeds, but this white paper will dig deeper into 10G USB 3.1 to clarify the evolutionary and revolutionary changes in the USB 3.1 specification. USB 3.1 introduces a new 10 Gbps signaling rate in addition to the 5 Gbps signaling rate defi... » read more

SoC Integration Mistakes
By Ed Sperling - 10 Mar, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss integration challenges with Ruggero Castagnetti, distinguished engineer at LSI; Rob Aitken, an ARM fellow; Robert Lefferts, director of engineering in Synopsys’ Solutions Group; Bernard Murphy, chief technology officer at Atrenta; and Luigi Capodieci, R&D fellow at GlobalFoundries. What follows are excerpts of that roundtable discussion. S... » read more

EDA Hungers For Growth
By Brian Bailey - 27 Feb, 2014 - Comments: 1

Look at the top line numbers provided by the EDA industry consortium (EDAC) and it appears as if the industry is doing well. In 2010, revenue was $5.285 billion. That number increased to $6.218 billion in 2011, and again to $6.529 billion in 2012, a 9.5% annual growth rate that would satisfy most investors. But the numbers do not tell the whole story. There is an interesting divide growing betw... » read more

SoC Integration Mistakes
By Ed Sperling - 26 Feb, 2014 - Comments: 1

Semiconductor Engineering sat down to discuss integration challenges with Ruggero Castagnetti, distinguished engineer at LSI; Rob Aitken, an ARM fellow; Robert Lefferts, director of engineering in Synopsys’ Solutions Group; Bernard Murphy, chief technology officer at Atrenta; and Luigi Capodieci, R&D fellow at GlobalFoundries. What follows are excerpts of that roundtable discussion. S... » read more

Executive Insight: Kathryn Kranen
By Ed Sperling - 17 Feb, 2014 - Comments: 0

Semiconductor Engineering sat down with Kathryn Kranen, president and CEO of Jasper Design Automation, to discuss what's changing in the semiconductor industry, why that's happening, and what to watch out for. The interview is part of an ongoing series of in-depth interviews with top executives from all segments of the industry. SE: What keeps you up at night? Kranen: Figuring out ways to... » read more

SoC Integration Mistakes
By Ed Sperling - 13 Feb, 2014 - Comments: 2

Semiconductor Engineering sat down to discuss integration challenges with Ruggero Castagnetti, distinguished engineer at LSI; Rob Aitken, an ARM fellow; Robert Lefferts, director of engineering in Synopsys’ Solutions Group; Bernard Murphy, chief technology officer at Atrenta; and Luigi Capodieci, R&D fellow at GlobalFoundries. What follows are excerpts of that roundtable discussion. SE... » read more

Cadence To Buy Forte
By The SE Staff - 05 Feb, 2014 - Comments: 2

Cadence agreed to buy Forte Design Systems for an undisclosed sum, enhancing its footprint in the high-level synthesis market as higher levels of abstraction gain traction across the SoC world. For the better part of a decade high-level synthesis (HLS) has been a market opportunity that was just around the next bend, along with electronic system-level design and SystemC modeling. Mentor Grap... » read more

The Next Big Threat: System Security
By Ed Sperling - 31 Jan, 2014 - Comments: 0

No SoC ever will be totally secure, and no technology will stop experienced thieves who really want to get into a device. But chipmakers and IP companies are examining ways to at least make it more difficult—and at least in theory, far less lucrative. One big change, of course, is that a connected electronic ecosystem has made location irrelevant. In the past, crime was limited to where th... » read more

Patents Under Scrutiny
By Brian Bailey - 30 Jan, 2014 - Comments: 2

After years of complaints by high-tech companies that the U.S. patent system is misused, too slow or completely outdated, patent attorneys are about to get their day in court. The U.S. Supreme Court has agreed to review an appeal between Alice Corp., an electronic marketplace for trading IP, and CLS Bank International, involving what kinds of inventions can be patented, according to the Supr... » read more

Experts At The Table: Yield And Reliability Issues With Integrating IP
By Ed Sperling - 27 Jan, 2014 - Comments: 1

Semiconductor Engineering sat down to discuss the impact of integrating IP in complex SoCs with Juan Rey, senior director of engineering at Mentor Graphics; Kevin Yee, product marketing director for Cadence’s SoC Realization Group; and Mike Gianfagna, vice president of marketing at eSilicon. What follows are excerpts of that conversation. SE: As an industry we’ve got a pretty good grasp ... » read more

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