Chiplets: Deep Dive Into Designing, Manufacturing, And Testing


Chiplets are a disruptive technology. They change the way chips are designed, manufactured, tested, packaged, as well as the underlying business relationships and fundamentals. But they also open the door to vast new opportunities for existing chipmakers and startups to create highly customized components and systems for specific use cases and market segments. This LEGO-like approach sounds ... » read more

Startup Funding: June 2022


Big money went to manufacturing in June, with a massive round for a Chinese analog foundry’s expansion to 55 – 40nm nodes. A fab management software startup also drew sizeable investment, as did a supplier of semiconductor-grade silicon components. Investors didn’t forget chip design, with three EDA companies receiving new funding, one of which drew over $100 million. Plus, numerous te... » read more

Blog Review: Feb. 9


Arm's Mark Inskip walks through how the Morello program built a demonstration of the architecture that enables fine-grained memory protection and highly scalable software compartmentalization based on the CHERI (Capability Hardware Enhanced RISC Instructions) architectural model, from IP development and SoC design to creating software and a demonstration board. Synopsys' Plamen Asenov and su... » read more

Designing 2.5D Systems


As more designs hit the reticle limit, or suffer from decreasing yield, migrating to 2.5D designs may provide a path forward. But this kind of advanced packaging also comes with some additional challenges. How you adapt and change your design team may be determined by where your focus has been in the past, or what you are trying to achieve. There are business, organizational, and technical c... » read more

Week In Review: Design, Low Power


Tools & IP Monozukuri unveiled its IC/Package co-design tool, GENIO. GENIO integrates existing silicon and package EDA flows to create full co-design and I/O optimization of complex multi-chip designs.  It works seamlessly across all existing EDA flows and comprises floor planning, I/O planning and end-to-end interconnect planning combined with cross-hierarchical pathfinding optimization.... » read more

Moore’s Law, Supply Chains And Security


The debate about the future of Moore's Law continues, while other parts of the industry look for alternatives. In between, supply chains are being pulled in multiple directions, with safety and security often in the middle. All across the semiconductor industry, significant changes are underway. Some of these have been in the works for some time. Others are new or accelerating faster than an... » read more