Design And Security Challenges for VR

By John Koon - 10 Aug, 2022 - Comments: 0

Virtual reality is no longer just for gamers, and as this technology is deployed in everything from health care to industrial training, the requirements for processing more data faster over a high-speed connection are growing. Designing these devices continues to be a study in contradictions. They must be extremely low power, with a small enough batteries to make them comfortable to wear. Bu... » read more

The MCU Dilemma

By Brian Bailey - 13 Feb, 2020 - Comments: 2

The humble microcontroller is getting squeezed on all sides. While most of the semiconductor industry has been able to take advantage of Moore's Law, the MCU market has faltered because flash memory does not scale beyond 40nm. At the same time, new capabilities such as voice activation and richer sensor networks are requiring inference engines to be integrated for some markets. In others, re... » read more

A Comparison Of Embedded Non-Volatile Memory Technologies And Their Applications

By Kilopass - 07 May, 2015 - Comments: 0

With complexity of SOCs growing and time to market cycles shortening, designers need to have an arsenal of tricks to deliver highly differentiated products to market quickly. The arsenal may include SystemC, EDA tools to achieve a faster timing closure, and IP from high speed I/Os to memories. The most pervasive memory IPs are SRAM and ROM. Less pervasive memory IPs include non-volatile memory ... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: MTP

Design And Security Challenges for VR

The MCU Dilemma

A Comparison Of Embedded Non-Volatile Memory Technologies And Their Applications