tag: Rambus

Designing For The Edge
By Ann Mutschler - 17 Apr, 2019 - Comments: 0

Chip and system architectures are beginning to change as the tech industry comes to grips with the need to process more data locally for latency, safety, and privacy/security reasons. The emergence of the intelligent edge is an effort to take raw data from endpoints, extract the data that requires immediate action, and forward other data to various local, regional or commercial clouds. The b... » read more

Blog Review: April 17
By Jesse Allen - 17 Apr, 2019 - Comments: 0

In a video, Mentor's Colin Walls digs into power management in embedded software with a particular look at the Power Pyramid model. Synopsys' Taylor Armerding checks out the state of application security at this year's RSA and finds that while organizations are paying attention to security through training and dedicated teams, roadblocks still remain. Cadence's Paul McLellan considers how... » read more

GDDR6 And HBM2: Signal Integrity Challenges For AI
By Frank Ferro - 11 Apr, 2019 - Comments: 0

In a nutshell, Artificial Intelligence (AI) and its growing list of applications demand a considerably large amount of bandwidth to push bits in and out of memory at the highest speeds possible. AI has been getting a lot of industry attention, and certainly it’s not a new phenomenon because it’s been gaining even greater traction in the last year or two. This is especially true since a n... » read more

Blog Review: April 10
By Jesse Allen - 10 Apr, 2019 - Comments: 0

Arm's Paul Whatmough discusses the growing use of real-time computer vision on mobile devices and proposes transfer learning as a way to enable neural network workloads on resource-constrained hardware. Cadence's Anton Klotz highlights a collaboration with Imec and TU Eindhoven on cell-aware test that reduces defect simulation time by filtering out defects with equivalent fault effects. M... » read more

GDDR6 – HBM2 Tradeoffs
By Ed Sperling - 10 Apr, 2019 - Comments: 0

Steven Woo, Rambus fellow and distinguished inventor, talks about why designers choose one memory type over another. Applications for each were clearly delineated in the past, but the lines are starting to blur. Nevertheless, tradeoffs remain around complexity, cost, performance, and power efficiency.   Related Video Latency Under Load: HBM2 vs. GDDR6 Why data traffic and bandw... » read more

The 7nm Pileup
By Ed Sperling - 04 Apr, 2019 - Comments: 1

The number of 7nm designs is exploding. Cadence alone reports 80 new 7nm chips under design. So why now, and what does this all mean? First of all, 7nm appears to be the next 28nm. It's a major node, and it intersects with a number of broad trends that are happening across the industry, all of which involve AI in one way or another. The big question now is how many of them will survive long ... » read more

Spreading Intelligence From The Cloud To The Edge
By Kevin Fogarty and Ed Sperling - 04 Apr, 2019 - Comments: 0

The challenge of partitioning processing between the edge and the cloud is beginning to come into focus as chipmakers and systems companies wrestle with a massive and rapidly growing volume of data. There are widely different assessments of how much data this ultimately will include, but everyone agrees it is a very large number. Petabytes are simply rounding errors in this equation, and tha... » read more

The Blockchain – Not As Secure As You Think
By Rambus - 03 Apr, 2019 - Comments: 0

The blockchain has the potential to touch all aspects of our everyday lives, from buying and trading cryptocurrency, to securing vital healthcare records, to proving that a tomato really is organic. The security challenges, specifically the vulnerability of private keys faced by the cryptocurrency market, prove that before the transformative impact of blockchain technology can be realized, a co... » read more

Blog Review: April 3
By Jesse Allen - 03 Apr, 2019 - Comments: 0

Synopsys' Taylor Armerding contends that as the IoT becomes more ubiquitous, the threat of cyber-physical attacks is rising, with the potential for a domino effect if even simple devices are compromised in large enough quantities. Mentor's Colin Walls considers the move away from programming on bare metal with the rise of drivers and RTOSes and when it makes sense to still use the old method... » read more

Blog Review: Mar. 27
By Jesse Allen - 27 Mar, 2019 - Comments: 0

Rambus' Steven Woo takes a look at the memory requirements of neural networks and why some companies are using on-chip memory while others are using HBM2 or GDDR6. Cadence's Lana Chan  observes growing momentum for NVMe and highlights some new features in the latest specification that are pushing mainstream adoption forward. Mentor's Matthew Ballance contends that when it comes to adopti... » read more

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