New Wave Of Consolidation

By Ed Sperling - 22 Nov, 2016 - Comments: 0

Consolidation is picking up again across the semiconductor industry, against a backdrop of looming interest rate hikes, geopolitical uncertainty, and the erosion of longstanding demarcations between markets. In the past couple of weeks, Siemens signed a deal to buy [getentity id="22017" e_name="Mentor Graphics"] for $4 billion, and [getentity id="22865" e_name="Samsung"] purchased Harman, a ... » read more

The Week In Review: Oct. 4

By Mark LaPedus - 04 Oct, 2013 - Comments: 0

By Mark LaPedus & Ed Sperling eSilicon introduced an automated multi-project wafer quote system, which allows companies to sort through a number of options and get pricing. The quotes are tied into TSMC's 20nm to 350nm processes, and GlobalFoundries’ 20nm to 180nm processes. The approach eliminates the need for companies to buy a full wafer if their volume requirements don’t warrant it... » read more

The Week In Review: May 31

By Ed Sperling - 31 May, 2013 - Comments: 0

By Ed Sperling Mentor Graphics and GlobalFoundries teamed up to deliver 20nm design kits that include Mentor’s place and route tool, including verification and conflict resolution engines for double-patterning violations. The 20nm process is used for GlobalFoundries’ 14nm finFETs. Mentor also received 16nm finFET certification from TSMC for the same tools plus its physical verification pl... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: RDA Microelectronics

New Wave Of Consolidation

The Week In Review: Oct. 4

The Week In Review: May 31