Mitigating Warpage In Multi-Chiplet Systems


Warpage of dies, redistribution layers, and interposers is a growing problem in multi-chiplet packages, and it can have a dramatic impact on the behavior and reliability of these devices. Multiple factors contribute to warpage, including larger chip sizes, severe thinning of the silicon substrate, temporary bonding and debonding processes, and scaling of bump pitch and size. Each of these ca... » read more

Reverse Laser Assisted Bonding (R-LAB) Technology For Chiplet Module Bonding On Substrate


By SeokHo Na, MinHo Gim, GaHyeon Kim, DongSu Ryu, DongJoo Park, and JinYoung Kim In the recent semiconductor market, there are many applications including smartphone, tablets, central processing units (CPUs), artificial intelligence (AI), data cloud and more that are expecting and experiencing rapid growth. As most of these applications require high performance, single-die Flip Chip packages... » read more