tag: Si2

Is There Light At The End Of Moore’s Tunnel
By Brian Bailey - 22 Nov, 2013 - Comments: 2

Electrons are slow, clumsy and quite easily distracted. They’re slow because it now takes a signal longer to cross a chip than the period of the clock signal. They often don’t travel in straight lines as they collide with other atoms. And electromagnetic interference between adjacent signals can mess with the information they are transferring. On the other hand, light has none of these p... » read more

Experts At The Table: What’s Next?
By Ed Sperling - 21 Nov, 2013 - Comments: 1

Semiconductor Engineering sat down with Jim Hogan, long-time industry venture capitalist; Simon Bloch, senior director at Samsung Electronics; Sumit DasGupta, formerly Si2 senior vice president of engineering; and Mike Gianfagna, vice president of marketing at eSilicon (VP of corporate marketing at Atrenta when this roundtable was held). What follows are excerpts of that discussion. SE: What... » read more

The Week In Review: System-Level Design
By Ed Sperling - 08 Nov, 2013 - Comments: 0

Si2’s OpenPDK rolled out its Open Process Specification 1.1, including elements necessary to automatically create a process design kit using any EDA vendor’s design flow. The standard uses formal grammar based on the XML Schema Definition. ARM won a deal with Rockchip, which is extending its license to a number of ARM processors as well as its GPU and interconnect technology. This marks ... » read more

The Problem With EDA Standards
By Brian Bailey - 07 Nov, 2013 - Comments: 0

In the EDA industry, does standard mean the same as it does in most industries? The Free Dictionary defines it as: Something, such as a practice or a product, that is widely recognized or employed, especially because of its excellence. In the EDA industry, a standards body is the place where EDA companies and customers come together to try and bring about convergence, often in a new or emerging... » read more

Blog Review: Oct. 30
By Ed Sperling - 30 Oct, 2013 - Comments: 0

Mentor’s Nazita Saye has stumbled on a phone that you can build yourself from various components. When something breaks, you simply change out what’s broken. Wasn’t that the concept behind the original Volkswagen Beetle? Cadence’s Brian Fuller launches into the discussion about 16nm headaches, including finFET parasitics, pin access and wire resistance. Looks like the transition to f... » read more

Lessons From The Big Apple
By John Ellis - 24 Oct, 2013 - Comments: 0

Apple this week announced some big changes in their product lineup. Having already released their MacBook Air with the power-sipping Intel Haswell processor, Apple has made further strides with an operating system upgrade that extends battery life by yet another 10% to 15%. For those deep into technology, you may already know that low-power design capability wasn’t created overnight. It h... » read more

A Tale Of Two Standards
By Ed Sperling - 18 Jul, 2013 - Comments: 0

By Ed Sperling It could well be one of the strangest developments in standards history. Two competing standards for power formats were rolled out in the middle of the last decade and aside from a few cries of foul they fell below the radar screen of most chip designers and architects for a half-dozen years. Fast forward to the present and the Common Power Format (CPF) and Unified Power Form... » read more

The Week In Review: Feb. 25
By Ed Sperling - 25 Feb, 2013 - Comments: 0

By Mark LaPedus Is China set to bail out a U.S. government technology darling? Two Chinese automotive companies, Geely and Dongfeng Motor, are reported to have bid between $200 million and $350 million for a majority stake in Fisker, the maker of plug-in hybrid cars. If that happens Fisker—which has $192 million in U.S. federal government loan guarantees—could be headed to China, according... » read more

More Intelligent Standards
By Ed Sperling - 11 Oct, 2012 - Comments: 0

There is a lot of talk these days about holistic power intent. The terminology may sound new, but the underpinnings are not. This was the idea behind the Common Power Format, which was proposed by Cadence back in 2006, and the Unified Power Format (more recently known as IEEE 1801), which was introduced the following year. These ideas were forward-looking at the time. They grasped the growi... » read more

3D Standards For The Real World
By Ed Sperling - 23 Feb, 2012 - Comments: 0

By Pallab Chatterjee Stacking die has progressed from what is technologically possible to what will be realistically feasible in a fabless or fab-lite world. The big challenges may be less about how to deal with stress caused by a TSV or thermal density and more about companies working together in a disaggregated supply chain. This was quite evident at a recent DesignCon panel dicussion on ... » read more

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