Blog Review: July 20


By Ed Sperling Synopsys’ Eric Huang pays a visit to the Microsoft Store and finds a really smart salesperson who seems to know just about everything there is to know about the products for sale. And yes, that is somewhat unexpected. Cadence’s Jean-Michel Fernandez talks about creating SystemC peripheral models. Fernandez represents Cadence’s Team ESL, which is an interesting developme... » read more

Blog Review: May 25


By Ed Sperling Cadence’s Richard Goering follows Jim Hogan’s talk about the democratization of MEMS. This market is showing big gains lately, but to really release the emergency brake will require a different design approach. Mentor’s Robin Bornoff revs up the engine and turns on the neon underbody lighting in this look at the overclocking market, shifting effortlessly from cars to PC... » read more

Standards Update


By Ann Steffora Mutschler In the sometimes-murky waters of system-level modeling standards where real-world adoption can be difficult to track, work is progressing to help hardware and software engineers realize the promise of true hardware-software codesign. The three main standards efforts related to modeling at the system level are OSCI’s TLM-2.0, OCP-IP’s OCP and Open Modeling TAB a... » read more

Building Up In 3D


By Ed Sperling Stacked die are expected to begin showing up in volume in late 2012 and in 2013, turning what has been a science experiment into a mainstream way of designing and manufacturing SoCs. This magnitude of this shift cannot be overstated, and clearly all of the pieces are not in place to make it all happen immediately. There also are significant technology challenges to overcome, ... » read more

Power Trip Advisor


By Geoffrey James There’s never been a greater demand for power-efficient silicon. As consumer electronic devices get smaller, with increased functionality, battery power becomes a premium resource. At the same time, “Green IT” is a major corporate trend, and the best way to be environmentally sensitive (while saving on energy costs) is to buy technology that ekes the maximum computing o... » read more

Considerations For Choosing The Right Low-Power Tools


By Cheryl Ajluni Regardless of what you are designing these days, one fact holds true: Your design is only as good as the design tools you use. Gone are the days when a design could be done on the back of napkin. Today, engineers require a complex ecosystem of interworking tools to guide them through the complex design flow. This is especially true when it comes to low-power design, as i... » read more

Experts At The Table: Evolving Standards


System-Level Design sat down with Keith Barkley, senior engineer in IBM’s systems and technology group; Steven Schulz, president and CEO of Silicon Integration Initiative (Si2); Yatin Trivedi, director of standards and interoperability programs at Synopsys; Ian Mackintosh, chairman of the OCP International Partnership (OCP-IP), and Michael Meredith, vice president of technical marketing at ... » read more

Experts At The Table: Evolving Standards


System-Level Design sat down with Keith Barkley, senior engineer in IBM’s systems and technology group; Steven Schulz, president and CEO of Silicon Integration Initiative (Si2); Yatin Trivedi, director of standards and interoperability programs at Synopsys; Ian Mackintosh, chairman of the OCP International Partnership (OCPIP), and Michael Meredith, vice president of technical marketing at For... » read more

Experts At The Table: Evolving Standards


System-Level Design sat down with Keith Barkley, senior engineer in IBM’s systems and technology group; Steven Schulz, president and CEO of Silicon Integration Initiative (Si2); Yatin Trivedi, director of standards and interoperability programs at Synopsys; Ian Mackintosh, chairman of the OCP International Partnership (OCPIP), and Michael Meredith, vice president of technical marketing at For... » read more

Verifying Low-Power IP And Designs


By Ed Sperling Verification has always been the time-consuming part of designs. Even at 120nm and above, where power wasn’t much of an issue, verification accounted for an estimated 70 percent of the non-recurring engineering expense in a chip. Since then, the tools to automate design have become more effective, but the complexity of designs has grown by leaps and bounds beyond those tools.... » read more

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