Electronic Design Creation: Overcoming PCB Design Challenges


Think of all the parts that make up the human body: legs, hands, lungs, bones, muscles, and so forth. Yet we are more than mere parts and organs, more than materials and functions. We are human beings. If one part doesn’t work smoothly, all parts are affected. This paper describes how the principle of 'gestalt,' in which an entity is more than the sum of its parts, pertains to the process of ... » read more

Blog Review: July 27


Mentor's Tom Fitzpatrick investigates how to add new behavior to an existing testbench with the UVM factory class. Synopsys' Srinivas Vijayaragavan and Pooja Gupta dig into new features of SAS 24G, including how its effective speed was doubled to 24G though signaling rate remains at 22.5G. Cadence's Paul McLellan highlights a presentation from the SEMI/Gartner Market Symposium focused on ... » read more

Mixed-signal/Low-power Design


Semiconductor Engineering sat down to discuss mixed-signal/low-power IC design with Phil Matthews, director of engineering at Silicon Labs; Yanning Lu, director of analog IC design at Ambiq Micro; Krishna Balachandran, director of low power solutions marketing at [getentity id="22032" comment="Cadence"]; Geoffrey Ying, director of product marketing, AMS Group, [getentity id="22035" e_name="Syno... » read more

The Week In Review: Design


Tools Synopsys updated its static timing analysis tool to use smart engineering change order (ECO) technology, which the company says reduces memory requirements by 5X and speeds runtime by 2X. The release also allows more scenarios on a single server, or flexible distribution to take advantage of customers' private compute clouds. IP Synopsys released MIPI display and camera interface... » read more

Colorless vs. Colored Double-Patterning Design Flows


Colored vs. Colorless double patterning design flows—do you know which one is best for your design? What options does your foundry allow? Do you debug one differently from the other? In this short video, I’ll demonstrate the differences between colored and colorless DP design flows, and explain the options and potential pitfalls of each approach. With a better understanding of how to design... » read more

To 7nm And Beyond


Gary Patton, chief technology officer at [getentity id="22819" comment="GlobalFoundries"], and Thomas Caulfield, senior vice president and general manager of Fab 8, sat down with Semiconductor Engineering to discuss future directions in technology, including the next rev of FD-SOI, the future of Moore’s Law, and how some very public challenges will likely unfold. SE: What do you see as the... » read more

Introduction To Multi-Patterning


Multi-patterning enables accurate lithographic resolution at today's most advanced nodes. Learn about the basics of this technology, and how it impacts your IC design and verification tasks and responsibilities. To read more, click here. » read more

Blog Review: July 20


Applied's Er-Xuan Ping addresses the challenges facing materials and processing in a changing memory landscape, and the opportunities that may arise. Cadence's Paul McLellan looks at teaching neural networks to perceive things more like humans do, through German traffic signs. Mentor's Colin Walls digs into managing timing and peripherals in embedded systems. Synopsys' Robert Vamosi ch... » read more

Can Verification Meet In The Middle?


Semiconductor Engineering sat down to discuss these issues with; Stan Sokorac, senior principal design engineer for [getentity id="22186" comment="ARM"]; Frank Schirrmeister, senior group director for product marketing for the system development suite of [getentity id="22032" e_name="Cadence"]; Harry Foster, chief verification scientist at [getentity id="22017" e_name="Mentor Graphics"], Bernie... » read more

The Week In Review: Design


Tools Synopsys unveiled its next-generation ATPG and diagnostics solution, TetraMAX II. According to the company, the tool is an order of magnitude faster than the previous generation, reducing runtime from days to hours, as well as generating 25% fewer patterns. The new tool is also certified for the ISO 26262 automotive functional safety standard. It has been deployed by STMicroelectronics... » read more

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