Achieving Physical Reliability Of Electronics With Digital Design


By John Parry and G.A. (Wendy) Luiten With today’s powerful computational resources, digital design is increasingly used earlier in the design cycle to predict zero-hour nominal performance and to assess reliability. The methodology presented in this article uses a combination of simulation and testing to assess design performance, providing more reliability and increased productivity. ... » read more

Verification’s Inflection Point


Functional verification is nearing an inflection point, brought on by rising complexity and the many tentacles that are intermixing it with other disciplines. New abstractions or different ways to approach the problems are needed. Being a verification engineer is no longer enough, except for those whose concerns is block-level verification. Most of the time and effort spent in verification i... » read more

RISC-V Verification Challenges Spread


The RISC-V ecosystem is struggling to keep pace with rapid innovation and customization, which is increasing the amount of verification work required for each design and spreading that work out across more engineers at more companies. The historical assumption is that verification represents 60% to 80% or more of SoC project effort in terms of cost and time for a mature, mainstream processor... » read more

10X Faster Electromagnetic 3D Simulation


Virtual prototypes are essential to optimize the signal integrity performance of their high-performance electronics products. Today, engineering teams are pushing to get fast electromagnetic (EM) simulations of printed circuit boards (PCB) and 3D chip packages in just a few hours with the highest level of accuracy. The state of the art in EM simulation has come a long way: Back in 2000 it wa... » read more

Simulating The Hyperloop


When SpaceX held the first Hyperloop Design Weekend Competition in Texas in January 2016, a team of five students from the Universitat Politècnica de València (UPV) in Spain, calling themselves Hyperloop UPV, won awards for Best Overall Concept Design and Best Propulsion System. The overall concept was to use magnetic levitation to give their Hyperloop vehicle a frictionless ride through t... » read more

HPC Appliance Boosts Simulation Performance


High-performance computing (HPC) resources can provide a substantial boost to simulation, but an HPC cluster can be complex and difficult to manage. By deploying a managed HPC cluster for ARA, the client was able to eliminate internal maintenance and support overhead, while improving productivity and reliability for their Ansys workloads. Click here to read more. » read more

System Simulation For RF Link Budget Analysis


This white paper examines how a more rigorous link budget analysis of an entire system can be determined through simulation, and how performing link budget analysis enables designers to address losses, gains, and power levels to meet the operational requirements of the radio communications system. Click here to read more. » read more

Virtual Prototyping For Power Electronics Systems


By Alan Courtay and Gobi Kengara Palayam Appavoo Every day, power electronics systems play a bigger role in our lives. All-electric and hybrid vehicles are now common on our streets. Electrification of the aerospace industry is accelerating, and observers expect hybrid and electric aircraft to make an impact over the next decade or two. Many industrial systems rely increasingly on electronic... » read more

A Better Path From Simulink To RTL With Catapult HLS


Design teams working on ASIC or FPGA projects often start with algorithm exploration using MATLAB in order to prove out the mathematical behavior of the functional blocks at a high level of abstraction. MATLAB as a high-level programming language doesn’t support hardware architecture modeling, so many teams use the Simulink environment for performing model-based, multi-domain simulation of th... » read more

RISC-V Custom Instruction Flow Application Note


A RISC-V processor has several defined decode spaces, for example custom0, custom1 etc. into which new custom instructions can be added. OVP Fast processor models can be extended without modification to the pre-compiled and verified base processor model source code using one or more extension libraries. An extension library can be loaded as part of a virtual platform definition in addition to t... » read more

← Older posts Newer posts →