Building Faster Chips


By Ed Sperling and Jeff Dorsch An explosion in IoT sensor data, the onset of deep learning and AI, and the commercial rollout of augmented and virtual reality are driving a renewed interest in performance as the key metric for semiconductor design. Throughout the past decade in which mobility/smartphone dominated chip design, power replaced performance as the top driver. Processors ha... » read more

Executive Insight: Aart de Geus


Aart de Geus, chairman and co-CEO of Synopsys, sat down with Semiconductor Engineering to discuss Moore's Law, the IoT, inflection points and how chip design will evolve in coming years. SE: We are in the middle of possibly one of the biggest transition points we’ve ever seen in this industry. How do you envision things shaking out? De Geus: There is no question that there is an enormou... » read more

Blog Review: July 20


Applied's Er-Xuan Ping addresses the challenges facing materials and processing in a changing memory landscape, and the opportunities that may arise. Cadence's Paul McLellan looks at teaching neural networks to perceive things more like humans do, through German traffic signs. Mentor's Colin Walls digs into managing timing and peripherals in embedded systems. Synopsys' Robert Vamosi ch... » read more

Can Verification Meet In The Middle?


Semiconductor Engineering sat down to discuss these issues with; Stan Sokorac, senior principal design engineer for [getentity id="22186" comment="ARM"]; Frank Schirrmeister, senior group director for product marketing for the system development suite of [getentity id="22032" e_name="Cadence"]; Harry Foster, chief verification scientist at [getentity id="22017" e_name="Mentor Graphics"], Bernie... » read more

How Cache Coherency Impacts Power, Performance


Managing how the processors in an SoC talk to one another is no small feat, because these chips often contain multiple processing units and caches. Bringing order to these communications is critical for improving performance and [getkc id="106" kc_name="reducing power"]. But it also requires a detailed understanding of how data moves, the interaction between hardware and software, and what c... » read more

The Week In Review: IoT


Deals IBM and AT&T announced that they will collaborate on computing and connectivity to offer open, standards-based tools on the IBM Cloud for Internet of Things developers to use. Almost 10 million developers will be active in IoT by 2020, the VisionMobile 2016 Internet of Things Megatrends reports forecasts, compared with an estimated 5 million IoT developers at present. "We have heard ... » read more

The Week In Review: Design


Tools Synopsys unveiled its next-generation ATPG and diagnostics solution, TetraMAX II. According to the company, the tool is an order of magnitude faster than the previous generation, reducing runtime from days to hours, as well as generating 25% fewer patterns. The new tool is also certified for the ISO 26262 automotive functional safety standard. It has been deployed by STMicroelectronics... » read more

Implementation Limits Power Optimization


Implementation is still the step that makes or breaks power budgets in chip design, despite improvements in power estimation, power simulations, and an increase in the number of power-related architectural decisions. The reason: All of those decisions must be carried throughout the design flow. “If implementation decides to give up, then it doesn't really matter at the end of the day,” s... » read more

The Indisputable Case For USB 2.0 Type-C In IoT Applications


USB is ubiquitous for a reason – It was designed specifically to be easy for consumers to use. When designers working in the fast-growing Internet of Things (IoT) market are looking for interfaces that can help with everything from charging to data transfer, USB is top-of-mind. However, IoT applications have performance, power and area requirements that are quite different from your phone or ... » read more

No More Easy IP Money


The semiconductor intellectual property ([getkc id="43" kc_name="IP"]) industry is two decades old, but questions are still being asked about what's wrong with it and what needs to be fixed. Normally these kinds of issues are reserved for fast-moving, young industries, not one that is the backbone of semiconductors. Design reuse has become an indispensable part of the design of nearly all el... » read more

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