Why the next couple nodes will redefine the semiconductor industry.
There is strong likelihood that enough companies will move to 7nm to warrant the investment. How many will move forward to 5nm is far less certain.
Part of the reason for this uncertainty is big-company consolidation. There are simply fewer customers left who can afford to build chips at the most advanced nodes. Intel bought Altera. Avago bought Broadcom. NXP bought Freescale. GlobalFoundries acquired IBM’s microelectronics business unit. While these acquisitions provide synergies and capabilities that didn’t exist in-house for the acquiring companies, they don’t necessarily result in twice as much volume at the leading-edge.
Moreover, the benefits of shrinking features are not as obvious as in the past. They used to be a guarantee of better performance and lower power at a lower cost. That’s no longer the case. Cost per transistor is increasing, and there is no indication that will change. In addition, the best way to improve power and performance is through new architectures and microarchitectures, different materials and advanced packaging.
Cisco, IBM, Apple and even Intel are all exploring different approaches to improve throughput to memory, including new communications schemes across multiple dies in a package and new memory types. Whether that happens at 28nm or 16/14nm is less important than how memories are accessed, how much flexibility is built into architectures, and whether physical effects can be adequately addressed.
Thermal effects are a big consideration. In a 5nm chip, dynamic power density coupled with current leakage will be problematic. Addressing that problem will require sophisticated circuitry and techniques, as well as a deep understanding of how heat can migrate across a die. Getting any part of that wrong can limit performance, because advanced chips will dial-down performance to deal with excess heat, or it will reduce reliability of a chip over time. That alone could negate any advantages of moving to 5nm.
The introduction of horizontal and vertical nanowires may help in this regard, but the basic issues of electrical resistance will persist. Adding new materials may help, providing they can be easily obtained and manufactured. New structures such as nanotubes could help, too, providing they can be attached at both ends. But there are a lot of uncertainties here, and with advanced chips increasingly finding their way into safety-critical markets such as self-driving cars and aerospace, there is potential legal liability. Risk, in this case, carries an actual price tag.
Even if all of these problems are solved, the writing is on the wall. The end of the ITRS road map and the rise of a series of road maps and standards efforts from various IEEE groups, SEMI and Si2, all point to fundamental changes occurring throughout the global semiconductor industry. This is not business as usual, and the companies that used to define where the industry will go next are beginning to change their tune about what comes next. Rumors are rampant that Apple will use a fan-out for its next iPhone. Intel, IBM, Cisco, Huawei and Xilinx already are in commercial production with 2.5D chips because that’s seen as the best way to improve performance.
While Intel/Altera, Xilinx and IBM can still benefit from increased density, and probably from 450mm wafers and panel-level packaging, the club is running out of members. And as volumes decrease, the number of equipment makers, IP vendors, foundries and EDA companies willing to invest will shrink, as well. It took an entire ecosystem to make Moore’s Law work, not a single company or end market. That may have been overlooked as big chipmakers and systems vendors towered over the rest of the industry for the past few decades, defining a schedule and a roadmap for progress. But it’s becoming increasingly obvious at each new successive process node node.
In simple terms, the system increasingly will define the chip rather than the other way around. While this has been creeping in for some time, it represents a fundamental change with ramifications that will take years to fully comprehend. There will be winners and losers, and not necessarily obvious ones. For those who get it right, though, the opportunities could be enormous.
Related Stories
Will 5nm Happen?
Investments in finFET technology are hard to discard, but technical and financial challenges for getting there are huge.
Plotting The Next Semiconductor Roadmap
Industry leaders examine enablers, implications, and perspectives for a changing technology ecosystem.
5nm Fab Challenges
New transistor types, plus issues with masks, patterning, materials, process control and interconnects, add up to a very tough transition.
Qualcomm, Mediatek, Spreadtrum, Huawei,Samsung already have mid range SoCs on FinFET. With some 2 billion smartphones in 2020, 5G ramping and this kind of competition , they can’t blink.
As for the ecosystem, they need people to keep pushing and they have to enable that, it’s a matter of survival.They can offer more but at the end of the day , you run out of 1 timers.
The ones that can invest, need to invest to stay ahead and even gain share, if they stop they become vulnerable.
Computing and communications are still some 70% of the revenue and advanced nodes will only become more important as devices shrink in size (PC to phone ,now to glasses), with the farm factor being extremely challenging. How do you get 1000 times higher efficiency compared to today’s phones, without waiting 20 years?
Other CE devices with displays declining and robots gaining traction will make this segment even more important.
More than Moore or whatever you want to call it, is additive not a replacement.