Week In Review: Manufacturing, Test

The U.S. Congress approved the CHIPS Act, a mammoth bipartisan achievement the New York Times called “the most significant government intervention in industrial policy in decades.” As passed, the full package — now called the Chips and Science Act — contains $52 billion in direct assistance for the semiconductor industry, along with $24 billion in tax incentives. In addition, the bill contains another $170 billion for research and development in related fields. Part of the funding will be used to create 20 regional technology hubs to increase the distribution of jobs.

President Biden is expected to quickly sign the bill, which he has been promising to do for more than a year. Of note, the legislation prohibits “recipients of federal incentive funds from expanding or building new manufacturing capacity for certain advanced semiconductors in specific countries that present a national security threat to the United States.”

Meanwhile, the U.S. and Japan are actively hammering out details on their 2nm chip partnership, with further details expected this week after a meeting in Washington. Mass production could be as early as 2025. Japan is squaring away internal fiscal support, with a current proposal to invest roughly $7.3 billion into R&D over the next 10 years.

South Korean conglomerate SK Group — which includes memory chip-maker SK Hynix — is investing $22 billion in the U.S. tech industry, including $15 billion in semiconductor investments for R&D programs, materials, and a testing packaging facility and another $5 billion in green energy businesses, including electric vehicle charging stations, green hydrogen production, and battery materials and recycling.

SkyWater received $15 million in funding from the U.S. Department of Defense toward open-source design for its 90nm process, part of the previously announced $27 million investment. “Through this important investment from the DoD and collaboration with Google, we will enable open-source design for our commercial SKY90-FD process technology, creating an IP pipeline and pathway to commercial volume manufacturing,” said SkyWater President and CEO Thomas Sonderman. “This will expand our 90nm foundry offering as a platform for innovation and productization here in the U.S.”

Intel and MediaTek announced a strategic partnership to manufacture chips using Intel Foundry Services’ (IFS) advanced process technologies. “As one of the world’s leading fabless chip designers powering more than 2 billion devices a year, MediaTek is a terrific partner for IFS as we enter our next phase of growth,” said IFS President Randhir Thakur. “We have the right combination of advanced process technology and geographically diverse capacity to help MediaTek deliver the next billion connected devices across a range of applications.”

Numbers

The photoresist market is forecast to grow by 7.5% to almost US$2.3 billion in 2022, with a 5.9% CAGR for the period 2021-2026, according to this recent TECHCET report. “In particular, EUV photoresists have firmly ‘arrived’ and are now officially being used for high volume chip manufacturing by multiple chip makers. EUV photoresist will grow rapidly as new logic nodes continue to be introduced; advanced DRAM enters production with EUV, especially as more ASML scanners are placed into production.”

Globally, silicon wafer shipments for Q2 2022 were 3.704B square inches, a 5% growth year-over-year, according to the latest report from SEMI’s Silicon Manufacturers Group.

Test

Advantest uncorked its MPT3000 solid state drive (SSD) test systems, the first with the ability to test PCIe Gen 5 devices, including those using the Compute Express Link (CXL) interconnect standard. “We are committed to driving memory and storage test innovation by developing the first systems and boards that will enable testing for both PCIe Gen 5 CXL and NVMe SSDs,” said Indira Joshi, vice president of the SSD Test Division, Advantest America. “By expanding our proven MPT3000 system’s capabilities to address PCIe Gen 5 CXL, we are well positioned also to expand our relationships with important customers in the memory market.”

Additionally, Advantest installed its first enhanced T5851-STM16G tester, capable of NVMe system-level test coverage, at a major manufacturer of IC memory devices. “This effort is just the latest example of our commitment to expand and integrate our test and measurement solutions throughout the entire semiconductor value chain,” said Masayuki Suzuki, Advantest’s executive vice president of the Memory Test Business Unit.

Standards

Last week, the OCP Foundation announced the Bunch of Wires (BoW) specification for chiplet interconnect. “The demand for specialized silicon has been increasing steadily due to workload diversity, such as with the adoption of AI and ML, and we expect this trend to continue for several years. In response to this demand, the OCP recognizes that it must be a catalyst to establish open and standardized chiplet ecosystems and new markets by investing in chiplet interconnect technology that will enable composable silicon. The release of the BoW specification is an important step in this direction. At the OCP we expect to increase our efforts on developing supply chain models for composable silicon,” said Bill Carter, CTO for the OCP Foundation.

Packaging

JCET realized 4nm chip packaging for smart phones, as well as the integrated packaging of CPU, GPU and RF chipset.

Earnings

July 2022 Semiconductor Industry Earnings Releases

*Revenue/sales growth reported in constant currency.

Apple consolidates in San Diego

Apple purchased the 67-acre Rancho Vista Corporate Center for $445 million. Previously, it had been renting space throughout the San Diego area. According to the San Diego Union Tribune, Apple intends to add 5,000 jobs by 2026. Speculation is that Apple may be trying to compete with Qualcomm for local talent as it tries to create its own cellular chips.

Further Reading

July’s Manufacturing, Packaging & Materials newsletter has these top stories:

• Hybrid Bonding Moves Into The Fast Lane
• How Quickly Can SiC Ramp?
• New Materials Open Door To New Devices
• Fab Investments Head Toward Record High

In case you missed this month’s Test, Measurement & Analytics newsletter, check out the stories on improving yield with machine learning, finding frameworks for end-to-end analytics, and why e-beam’s role is growing for defect detection.

Upcoming events

In-person and hybrid conferences are back. On the schedule:

• IEEE International Conference on Manipulation, Manufacturing and Measurement on the Nanoscale (3M-NANO), Aug. 8 – 12 (Tianjin, China/Hybrid)
• SPIE Optics & Photonics, Aug. 21 – 25 (San Diego, CA)
• AI Hardware/Edge AI Summit, Sept. 13 – 15 (Santa Clara, CA)
• Semicon Taiwan, Sept. 14 – 16 (Taipei, Taiwan)
• SPIE Photonics Industry Summit, Sept. 21 (Washington, D.C.)
• SPIE Photomask Technology/Extreme Ultraviolet Lithography, Sept. 25 – 29 (Monterey, CA)
• 55th International Symposium on Microelectronics, Oct. 3 – 6 (Boston)

–Linda Christensen contributed to this article–