Pre-Layout, Post-Layout Circuit Reliability


With the increasing complexity of design layouts and shorter tapeout cycles, waiting until signoff verification to check design reliability is no longer practical for design teams. Designers must now apply reliability verification checks throughout the design flow, from intellectual property (IP) level to full-chip level, to ensure they meet tapeout schedules while confirming design reliability... » read more

Impacts Of Process Flow, Scaling, And Variability On Interconnect Performance


Virtual fabrication is used to evaluate the performance of interconnects (line and via resistance, capacitance, etc.) across pitches compatible with either EUV single exposure or SADP for three different process flows: single damascene, dual damascene, and semi-damascene (subtractive metal etch). The effects of process variation for the three flows are also investigated to determine the relativ... » read more

Meeting The Major Challenges Of Modern Memory Design


Memory lies at the heart of every electronics application, and demand is growing all the time. Users want ever greater capacity, throughput, and reliability. At the same time, time to market (TTM) goals and competitive pressures mandate that memories be developed in ever shorter project schedules. These requirements put enormous pressure on designers of discrete memory chips, memory dies in 2.5... » read more

Blog Review: April 26


Codasip's Tora Fridholm introduces the NimbleAI project, an effort to design a neuromorphic sensing and processing 3D integrated chip that implements an always-on sensing stage, highly specialized event-driven processing kernels and neural networks to perform visual inference of selected stimuli using the bare minimum amount of energy. Synopsys' Anjaneya Thakar discusses computational lithog... » read more

Automated HW/SW Co-Design Of DSP Systems Composed Of Processors And Hardware Accelerators


Seemingly overnight, data acquisition and digital signal processing have gone from a hidden background function in special purpose-built subsystems, such as PC graphics cards and airborne missile guidance systems, to the foreground in the form of in-ear IoT devices, smartphones, and autonomous vehicles. As the number of smart data-acquisition devices grows, so does the amount of data requiring ... » read more

Research Bits: April 25


Superconductor breakthrough — palladium Palladium may be a better superconductor than even nickelates (superconductors based on nickel), according to research by TU Wien working with Japanese universities. The research shows that palladates may be a ‘Goldilocks material’ in which it can continue its superconducting state at a higher temperature. "Palladium is directly one line below n... » read more

Silicon Lifecycle Management Advances With Unified Analytics


In a typical day in the life of a product engineer, they have gone through the requisite wafer sort testing in manufacturing with the next step to assemble the resultant good die into their respective packages. While performing a series of parametric tests during final test, yield issues are encountered and the process of finding the source of the issues begins. Luckily, with access to a good d... » read more

Chip Industry’s Technical Paper Roundup: Apr. 25


New technical papers recently added to Semiconductor Engineering’s library: [table id=94 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Programmable General-Purpose I/O


Talking to many different kinds of chips is becoming more complicated. There are new types of transistors, new protocols, and all of this is limited by the number of pins. Geoff Tate, CEO of Flex Logix, talks about adding programmability into the general-purpose I/O to enable more flexibility, lower inventory, and reduced obsolescence. » read more

IC Security Issues Grow, Solutions Lag


Experts at the Table: Semiconductor Engineering sat down to talk about the growing chip security threat and what's being done to mitigate it, with Mike Borza, Synopsys scientist; John Hallman, product manager for trust and security at Siemens EDA; Pete Hardee, group director for product management at Cadence; Paul Karazuba, vice president of marketing at Expedera; and Dave Kelf, CEO of Breker V... » read more

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