Enabling SoC Visibility For Future Secure Hardware Architectures With In-Chip Environmental Monitoring
By Ramsay Allen - 07 Jun, 2022 - Comments: 0

Billions of people around the world are now online and generating vast amounts of data every day. This data revolution, which is largely driven by user performance requirements, is a double-edged sword. On one hand it is enabling huge technology advancements, revolutionizing the way we connect with each other and the world around us, but on the other hand it is exposing major vulnerabilities in... » read more

Trends In Testing: New Challenges Create New Opportunities
By Doug Lefever - 07 Jun, 2022 - Comments: 0

As advancements in semiconductors and microelectronics soldier ahead into emerging, even uncharted, territory, new test challenges arise. To that end, let’s look at a few key trends and challenges that are driving opportunities for innovation in the test sector. Technology convergence has been a buzzword for some time, and this trend is only going to intensify with the heightened need to m... » read more

Silicon Lifecycle Management: Actionable Silicon Insights Through Intelligent Measurement And Analysis (2022)
By Synopsys - 07 Jun, 2022 - Comments: 0

Semiconductors have always been challenging to develop, with many waves of innovation in electronic design automation (EDA) tools and fabrication technologies barely keeping ahead of ever-growing design size and sophistication. Once again, the industry has reached a tipping point. The combination of increasing chip and system complexity, coupled with higher expectations for product performance ... » read more

Atomic Force Microscopy Covers The Landscape Of Polymer Characterization
By Bruker - 07 Jun, 2022 - Comments: 0

"Materials scientists designing a polymer-based material for a specific application must analyze how and why all these factors come together to impact the final product. Understanding the structure and properties at the microscopic level is critical to a complete understanding of the material. “Everybody wants to make their materials perform better at the macroscale,” says Bede Pittenger, a... » read more

New Method For BEOL Overlay And Process Margin Characterization
By PDF Solutions - 07 Jun, 2022 - Comments: 0

This paper presents a new method, design for inspection (DFI) to characterize overlay. Using design-assisted voltage contrast measurement, the method enables in-line test and monitoring of process induced OVL and CD variation of backend-of line (BEOL) features with litho-etch-lithoetch (LELE) patterning. While only some of the features of multi-color patterning scheme are chosen to be aligned d... » read more

Measurement Of Deep Trenches To Study The RIE Lag Effect
By KLA - 07 Jun, 2022 - Comments: 0

The demand for accurate characterization of high aspect ratio geometries such as narrow gaps, deep trenches or deep holes arises in many technologies and industries. A variety of metrology techniques have been utilized to accommodate these needs. Among the candidates for this type of metrology, 3D optical profiling characterization is becoming more and more prevalent in process control. Due to ... » read more

System Level Test — A Primer
By Teradyne - 07 Jun, 2022 - Comments: 0

As semiconductor geometries become smaller and greater complexity is pushed into chips or packages, System Level Test (SLT) is becoming essential. SLT is testing a device under test (DUT) as it is used in the end-use system, by merely using it rather than creating test vectors, as is done with traditional automated test equipment (ATE). Tests are still written but in a different way… Pete... » read more

Semiconductor Test: Staying Ahead Of Nanodevices
By Tucker Davis - 07 Jun, 2022 - Comments: 0

In the semiconductor fabrication process, engineers continue to innovate, enabling smaller transistors and higher density circuits. The transition to finFETs allowed 7nm and 5nm processes to realize circuits of amazing density, and the progress of nanosheet transistors provides confidence in the future advancement of digital circuit cost reduction and performance improvement. As individual t... » read more

Effect of Different Frequency Scaling Levels on Memory in Regard to Total Power Consumption in Mobile MPSoC
By Technical Paper Link - 06 Jun, 2022 - Comments: 0

New technical paper titled "CPU-GPU-Memory DVFS for Power-Efficient MPSoC in Mobile Cyber Physical Systems" from researchers at University of Essex, Nosh Technologies, and University of Southampton. Abstract "Most modern mobile cyber-physical systems such as smartphones come equipped with multi-processor systems-on-chip (MPSoCs) with variant computing capacity both to cater to performance r... » read more

Fermi-level Tuning Improves Device Stability of 2D Transistors With Amorphous Gate Oxides
By Technical Paper Link - 06 Jun, 2022 - Comments: 0

New technical paper titled "Improving stability in two-dimensional transistors with amorphous gate oxides by Fermi-level tuning" from researchers at Institute for Microelectronics, TU Wien, AMO GmbH, University of Wuppertal, and RWTH Aachen University. Abstract "Electronic devices based on two-dimensional semiconductors suffer from limited electrical stability because charge carriers origin... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy