Static Verification Of Low Power Designs


Are there any chips designed today that don’t have limitations on their power consumption? For smartphones and tablets, increasing the time between charges is a clear product differentiator and a frequent design goal. Power consumption is also an issue for Internet-of-Things (IoT) devices, many of which are in inaccessible locations where battery replacement or recharge is difficult. Even com... » read more

Transforming Silicon Bring-Up


Not too long ago, the return of first silicon from the foundry was a nail-biting moment as power was applied to the chip. Today, better verification methodologies, increased use of emulation, and more mature fabrication practices have transformed how teams utilize first silicon. It is about to be transformed again, and there are some interesting possibilities on the horizon. Much of what use... » read more

Verification In The Era Of Autonomous Driving, Artificial Intelligence And Machine Learning


The last couple of weeks have been busy with me participating on three panels that dealt with AI and machine learning in the contexts of automotive and aero/defense, in San Jose, Berlin and Detroit. The common theme? Data is indeed the new oil, and it messes with traditional value creation in electronics. Also, requirements for system design and verification are changing and there are completel... » read more

Developing Robust Finite State Machines Code With Lint Tools


As design size and complexity grows, the design verification effort grows even more. It takes significant amount of time to thoroughly verify complex control logic of a design, which is the key and the most critical component of design functionality. One of the most common design patterns in the control logic design are finite state machines. They could be designed in different styles, state an... » read more

Thoroughly Verifying Complex SoCs


The number of things that can go wrong in complex SoCs targeted at leading-edge applications is staggering, and there is no indication that verifying these chips will function as expected is going to get any easier. Heterogeneous designs developed for leading-edge applications, such as 5G, IoT, automotive and AI, are now complex systems in their own right. But they also need to work in conju... » read more

A Reliable I/O Ring For A Reliable SoC


What is an input/output (I/O) ring, and why should I care about it? If you’re a system-on-chip (SoC) designer, you had better know the answer to that question. SoCs are the darlings of the semiconductor industry—they combine all the typical functionality of a computer (central processing unit (CPU), memory, input/output (I/O) ports, and storage) on a single chip. They’re particularly popu... » read more

Optimizing Hardware Faster


Maximillian Odendahl, CEO of Silexica, sat down with Semiconductor Engineering to talk about high-level synthesis and the changing role of this technology. What follows are excerpts of that conversation. SE: What is the direction that high-level synthesis is heading in? Odendahl: The direction hasn’t changed, but in the past HLS was not usable by the software guys. The main push right n... » read more

Enhancing IO Ring Checks For Consistent, Customizable Verification


The Calibre PERC IO ring checker framework eliminates manual checking by providing a robust DRC-like environment to verify all IO placement rules with sign-off quality. Running on the first LEF/DEF floorplan, the IO ring checker provides early and full coverage of IO ring placement rules, enabling changes with minimal impact on the layout. Fast, accurate debugging and correction ensures that So... » read more

Manufacturing Bits: Nov. 25


RF carbon nanotubes For years, the industry has been working on logic and memory devices based on carbon nanotubes, although these technologies remain in R&D. Now, there is a new device type using carbon nanotubes--RF. Startup Carbonics has developed an RF-based carbon nanotube technology that operates at frequencies over 100GHz. The technology exceeds the cutoff frequency of today�... » read more

Accelerating Financial Applications With SLX FPGA


This white paper demonstrates how engineers creating FPGA-based hardware accelerators for financial market models can take advantage of SLX FPGA. SLX FPGA can be used to accelerate optimization efforts for financial market models targeting option pricing. In this paper, two implementations of computation intensive models for pricing options are discussed, namely the Black-Scholes and Heston pri... » read more

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